upd720114 Renesas Electronics Corporation., upd720114 Datasheet
upd720114
Available stocks
Related parts for upd720114
upd720114 Summary of contents
Page 1
The PD720114 is a USB 2.0 hub device that complies with the Universal Serial Bus (USB) Specification Revision 2.0 and works up to 480 Mbps. USB 2.0 compliant transceivers are integrated for upstream and all downstream ports. μ The ...
Page 2
ORDERING INFORMATION Part Number μ 48-pin plastic TQFP (Fine pitch) (7 × 7) PD720114GA-9EU-A μ 48-pin plastic TQFP (Fine pitch) (7 × 7) PD720114GA-YEU-A BLOCK DIAGRAM To Host/Hub downstream Upstream facing port facing port UP_PHY CDR SERDES SIE_2H ALL_TT APLL ...
Page 3
APLL : Generates all clocks of Hub. ALL_TT : Translates the high-speed transactions (split transactions) for full/low-speed device to full/low-speed transactions. upstream or downstream direction. For OUT transaction, ALL_TT buffers data from upstream port and sends it out to the ...
Page 4
PIN CONFIGURATION (TOP VIEW) • 48-pin plastic TQFP (Fine pitch) (7 × 7) μ PD720114GA-9EU-A μ PD720114GA-YEU DD25OUT V 2 SSREG LED4 3 LED3 4 LED2 5 LED1 6 GREEN 7 AMBER DD33 X1 10 ...
Page 5
Pin No. Pin Name Pin No BUS_B DD25OUT TEST SSREG 3 LED4 15 RREF 4 LED3 LED2 LED1 GREEN AMBER 20 V ...
Page 6
PIN INFORMATION Pin Name I/O Buffer Type X1 I 2.5 V input X2 O 2.5 V output SYSRSTB I 3.3 V Schmitt input DP(4:1) I/O USB D+ signal I/O DM(4:1) I/O USB D− signal I/O DPU I/O USB D+ ...
Page 7
ELECTRICAL SPECIFICATIONS 2.1 Buffer List • 2.5 V Oscillator interface X1, X2 • tolerant Schmitt input buffer CSB1, VBUSM • 3.3 V Schmitt input buffer CSB(4:2),BUS_B, SYSRSTB, TEST • 3 output buffer ...
Page 8
Terminology Terms Used in Absolute Maximum Ratings Parameter Symbol Power supply voltage V , DD33 V DD33REG Input voltage V I Output voltage V O Output current I O Operating temperature T A Storage temperature T stg Terms Used ...
Page 9
Terms Used in DC Characteristics Parameter Symbol Off-state output leakage current I OZ Output short circuit current I OS Input leakage current I I Low-level output current I OL High-level output current I OH Meaning Indicates the current that flows ...
Page 10
Electrical Specifications Absolute Maximum Ratings Parameter Power supply voltage V DD33 Input/output voltage 3.3 V input/output voltage 5 V input/out voltage Output current I O <R> Operating temperature T A Storage temperature T stg Caution Product ...
Page 11
DC Characteristics (V = 3. DD33 Control Pin Block Parameter Off-state output leakage current Output short circuit current Low-level output current 3.3 V low-level output current (3 mA) 3.3 V low-level output current (12 mA) High-level ...
Page 12
USB Interface Block Parameter Output pin impedance Termination voltage for upstream facing port pullup (full-speed) Input Levels for Low-/full-speed: High-level input voltage (drive) High-level input voltage (floating) Low-level input voltage Differential input sensitivity Differential common mode range Output Levels for ...
Page 13
Figure 2-1. Differential Input Sensitivity Range for Low-/full-speed Differential Input Voltage Range -1.0 0.0 0.2 0.4 0.6 0.8 1.0 Input Voltage Range (Volts) Figure 2-2. Full-speed Buffer V OH −3.3 −2.8 −2 Min. Max. ...
Page 14
Figure 2-4. Receiver Sensitivity for Transceiver at DP/DM Level 1 Level 2 0% Figure 2-5. Receiver Measurement Fixtures USB V BUS Connector D+ Nearest D- Device GND 143 Ω 14 Point 3 Point 4 Point 1 Point 2 Point 5 ...
Page 15
Power Consumption Parameter Symbol Power Consumption P W-0 P W-2 P W-3 P W-4 P W-UNP P W_S Notes 1. Ports available but inactive or unplugged do not add to the power consumption. 2. The power consumption depends on the ...
Page 16
AC Characteristics (V = 3. DD33 Pin capacitance Parameter Input capacitance Output capacitance I/O capacitance System Clock Ratings Parameter Clock frequency Clock Duty cycle Remarks 1. Recommended accuracy of clock frequency is ± 100 ppm. 2. ...
Page 17
Over-current Response Timing Parameter Over-current response time from CSB low PPB high (Figure 2-7) Figure 2-7. Over-current Response Timing CSB(4:1) PPB(4:1) Hub power supply Bus reset Up port D+ line PPB pin output CSB pin input Port ...
Page 18
USB Interface Block Parameter Low-speed Electrical Characteristics Rise time (10% to 90%) Fall time (90% to 10%) Differential rise and fall time matching Low-speed data rate Downstream facing port source jitter total (including frequency tolerance) (Figure 2-13): To next transition ...
Page 19
Parameter Full-speed Electrical Characteristics (Continued) Consecutive frame interval jitter Source jitter total (including frequency tolerance) (Figure 2-13): To next transition For paired transitions Source jitter for differential transition to SE0 transition (Figure 2-14) Receiver jitter (Figure 2-15): To Next Transition ...
Page 20
Parameter Hub Event Timings Time to detect a downstream facing port connect event (Figure 2-17): Awake hub Suspended hub Time to detect a disconnect event at a hub’s downstream facing port (Figure 2-16) Duration of driving resume to a downstream ...
Page 21
Parameter Hub Event Timings (Continued) Resume recovery time Time to detect a reset from upstream for non high-speed capable devices Reset recovery time (Figure 2-18) Inter-packet delay for full-speed Inter-packet delay for device response with detachable cable for full-speed SetAddress() ...
Page 22
Figure 2-9. Transmit Waveform for Transceiver at DP/DM Level 1 Point 1 Level 2 0% Figure 2-10. Transmitter Measurement Fixtures USB V BUS Connector D+ Nearest D- Device GND 143 Ω 22 Point 3 Point 4 Point 2 Point 5 ...
Page 23
Timing Diagram Figure 2-11. Hub Differential Delay, Differential Jitter, and SOP Distortion Upstream End of 50% Point of Cable Initial Swing V SS Hub Delay Downstream Downstream Port of Hub t HDD1 Downstream Hub Delay with Cable ...
Page 24
Figure 2-12. Hub EOP Delay and EOP Skew 50% Point of Initial Swing Upstream End of Cable EOP- EOP+ Downstream Port of Hub Downstream EOP Delay with Cable Downstream Port of Hub V ...
Page 25
Figure 2-13. USB Differential Data Jitter for Low-/full-speed t PERIOD Crossover Differential Points Data Lines Consecutive Transitions N × t PERIOD Figure 2-14. USB Differential-to-EOP Transition Skew and EOP Width for Low-/full-speed t PERIOD Crossover Point Differential Data Lines Diff. ...
Page 26
Figure 2-16. Low-/full-speed Disconnect Detection D+/D− V (min) IHZ V IL D−/ Device Disconnected Figure 2-17. Full-/high-speed Device Connect Detection Device Connected Figure 2-18. Power-on and Connection Events Timing Hub port Attatch detected power ...
Page 27
PACKAGE DRAWINGS μ • PD720114GA-9EU-A 48-PIN PLASTIC TQFP (FINE PITCH) (7x7 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
Page 28
PD720114GA-YEU-A 48-PIN PLASTIC TQFP (FINE PITCH)(7x7 NOTE Each lead centerline is located within 0. its true position at maximum material condition ...
Page 29
RECOMMENDED SOLDERING CONDITIONS μ The PD720114 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. ...
Page 30
Data Sheet S17462EJ5V0DS μ PD720114 ...
Page 31
NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
Page 32
ECOUSB is a trademark of NEC Electronics Corporation. • The information in this document is current as of January, 2008. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data ...