32c408b Maxwell Technologies, 32c408b Datasheet - Page 7

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32c408b

Manufacturer Part Number
32c408b
Description
4 Megabit 512k X 8-bit Sram
Manufacturer
Maxwell Technologies
Datasheet

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1. WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to the first transition address.
3. t
4. At any given temperature and voltage condition, t
5. Transition is measured +200mV from steady state voltage with Load(B). This parameter is sampled and not 100% tested.
6. Device is continuously selected with CS = V
7. Address valid prior to coincident with CS transition low.
4 Megabit (512K x 8-Bit) SRAM
8. For common I/O applications, minimization or elimination of bus contention is necessary during read and
write cycle.
V
HZ
OL
and t
levels.
OHZ
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
F
IGURE
F
4. T
IGURE
IMING
5. SRAM H
IL
.
W
AVEFORM OF
HZ(max)
05.02.02 Rev 7
is less than t
EAVY
R
I
ON
EAD
LZ(min)
C
C
ROSS
All data sheets are subject to change without notice
YCLE (2)
both for a given device and from device to device.
S
ECTION
(WE = V
IH
)
©2002 Maxwell Technologies
32C408B
All rights reserved.
OH
or
7

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