IDT74ALVCH162820PAG IDT, Integrated Device Technology Inc, IDT74ALVCH162820PAG Datasheet
IDT74ALVCH162820PAG
Manufacturer Part Number
IDT74ALVCH162820PAG
Description
IC FLIP FLOP 3ST 10BIT 56TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74ALVCHr
Type
D-Typer
Datasheet
1.IDT74ALVCH162820PAG8.pdf
(6 pages)
Specifications of IDT74ALVCH162820PAG
Function
Set(Preset) and Reset
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
10
Frequency - Clock
150MHz
Delay Time - Propagation
1ns
Trigger Type
Positive Edge
Current - Output High, Low
12mA, 12mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVCH162820PAG
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP package
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low switching noise
APPLICATIONS:
• SDRAM Modules
• PC Motherboards
• Workstations
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
FUNCTIONAL BLOCK DIAGRAM
© 2006 Integrated Device Technology, Inc.
IDT74ALVCH162820
3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS
machine model (C = 200pF, R = 0)
CC
CC
CC
= 3.3V ± 0.3V, Normal Range
= 2.7V to 3.6V, Extended Range
= 2.5V ± 0.2V
SK(o)
CLK
1
2
OE
OE
(Output Skew) < 250ps
D
1
56
55
28
1
3.3V CMOS 10-BIT FLIP-
FLOP WITH DUAL OUTPUTS
TO NINE OTHER CHANNELS
D
C
1
1
1
DESCRIPTION:
The ALVCH162820 is an edge-triggered D-type flip-flop. On the positive
transition of the clock (CLK) input, the device provides true data at the Q
outputs.
in either a normal logic state (high or low logic level) or a high-impedance
state. In the high impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide
the capability to drive bus lines without the need for interface or pullup
components. OE input does not affect the internal operation of the flip-flops.
Old data can be retained or new data can be entered while the outputs are
in the high-impedance state.
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
This 10-bit flip-flop is built using advanced dual metal CMOS technology.
A buffered output-enable (OE) input can be used to place the ten outputs
The ALVCH162820 has series resistors in the device output structure
The ALVCH162820 has “bus-hold” which retains the inputs’ last state
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH162820
2
3
1
1
Q
Q
MAY 2006
1
2
DSC-4497/4
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IDT74ALVCH162820PAG Summary of contents
Page 1
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS FEATURES: • 0.5 MICRON CMOS Technology • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF ...
Page 2
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS PIN CONFIGURATION GND ...
Page 3
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input LOW Voltage ...
Page 4
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in the DC ...
Page 5
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 300 ...
Page 6
IDT74ALVCH162820 3.3V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS ORDERING INFORMATION X XX IDT XX ALVC Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 XX XXX Device Type Package PA PAG 820 162 H ...