st2064b Sitronix Technology Corporation, st2064b Datasheet - Page 31
st2064b
Manufacturer Part Number
st2064b
Description
8 Bit Microcontroller With 64k Bytes Rom
Manufacturer
Sitronix Technology Corporation
Datasheet
1.ST2064B.pdf
(57 pages)
- Current page: 31 of 57
- Download datasheet (895Kb)
14.2 Sample Rate Control
PSG1L and PSG1H control the sample rate. PSG1[11~6]
controls PWM repeat times (usually set=111100 for four
times of DAC reload) and PSG1[5~0] usually set ‘ 1’ . The
Ver. 3.0
PSG1[11~0]
DAC[7~0]
PSGCK
DMD[0]
DMD[1]
DACE
PSGC[6~4]
DAC interrupt frequency
INH
OSCX
RC
16K
8K
Sample Rate Generator
CK_IN
Enable
PSG1[11~0]
TABLE 14-4 DAC Sample Rate Description (RC
IN0
IN1
PSG Selector
Output
Select
FIGURE 14-2 DAC Clock Source Control
Output
FIGURE 14-1 DAC Diagram
PSGC b6, b5, b4
Fs
100
100
PSGCK
DAC[7~0]
DMD[0]
DMD[1]
Fs
Enable
PWM Generator
31/57
input clock source is controlled by PCK[2~0]. The block
diagram is shown as the following:
Reload_DAC
POB
PO
B6
X
X
0
0
1
PSGC
B5
OSC
0
0
1
1
0
00001111, 00111111
00001111, 10111111
= 2MHz)
PSG1H, PSG1L
B4
0
1
0
1
0
SYSCK/2
SYSCK/4
SYSCK
SYSCK/8
SYSCK x 2
PSGCK
BD
BDB
Reload_DAC
ST2064B
5/8/09
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