st2024c Sitronix Technology Corporation, st2024c Datasheet - Page 22

• Manufacturer Part Number: st2024c
• Description: 24k 8-bit Single Chip Microcontroller
• Manufacturer: Sitronix Technology Corporation

1
ST2024C is with dual-clock system. Programmer can
choose between OSC(RC) and OSCX(32.768k), or both as
clock source through program. The system clock(SYSCK)
also can be switched between OSC and OSCX. The OSC
will be switch with “0” and OSCX will be switch with “1” for
Ver 2.2
1
Note:
Address Name
1
1
$030
.
.
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
The XSEL(SYS[7]) bit will show which real working mode is when it is read.
O
O
S
S
SYS
TEST : Test bit, must be “0”
XSEL : SYS [XSEL] must be 0.
OSTP : OSC stop control bit
XSTP : OSCX stop control bit
WSKP : System warm-up control bit
WAIT : WAI-0 / WAI-1mode select bit (Refer to POWER DOWN MODE)
1 = Disable OSC
0 = Enable OSC
1 = Disable OSCX
0 = Enable OSCX
1 = Warm-up to 16 oscillation cycles
0 = Warm-up to 256 oscillation cycles
1 = WAI instruction causes the chip to enter WAI-1 mode
0 = WAI instruction causes the chip to enter WAI-0 mode
C
C
OSCX
I
I
XSEL
L
OSC
L
L
L
R/W
R/W
A
A
T
T
O
O
TABLE 11-18: SYSTEM CONTROL REGISTER (SYS)
R
R
XSEL
Bit 7
IN0
IN1
FIGURE 11-5: System Clock Diagram
OSTP
Bit 6
MUX2
SEL
OUTPUT
XSTP
Bit 5
22/54
TEST
Bit 4
XSEL. Whenever system clock be switch, the warm-up
cycles are occur at the same time. That is confirm SYSCK
really switched when read XSEL bit. LCD driver, Timer1,
Base Timer and PSG can utilize these two clock sources as
well.
Frequency divided by 2
WSKP
Bit 3
IN
2
OUT
WAIT
Bit 2
Bit 1
-
SYSCK
Bit 0
-
0000 00- -
ST2024C
Default
1/31/08