sm5330af Nippon Precision Circuits Inc, (NPC), sm5330af Datasheet - Page 19

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sm5330af

Manufacturer Part Number
sm5330af
Description
3-channel Video Filter With Built-in 4-system Switch
Manufacturer
Nippon Precision Circuits Inc, (NPC)
Datasheet
SM5330A
YOUT Pin
The YOUT pin is the unfiltered output of the selected system input pin (IN1_3, IN2_3, IN3_3, or IN4_3). The
output gain is approximately 0dB.
IREF Pin
The IREF pin controls the built-in lowpass filter reference current, using a 1.8kΩ ± 1% control resistor that
must be connected. The current flows into the IREF pin in normal operating mode and during output muting.
VREF Pin
The VREF pin is the internal reference voltage output. It is recommended that a capacitor be connected
between VREF and GND to ensure SM5330A operating stability. The recommended value is 1µF. The voltage
on VREF is output in normal operating mode and during output muting.
D-Terminal Discrimination Function
2
The D-terminal signal discrimination result can be read using the I
C BUS. The status register SW1 bit returns
the state of IN1_SW, and the SW2 bit returns the state of IN2_SW. When IN1_n is selected by control register
settings (INSEL = 100b), the status register L1, L2, L3 bits return the IN1_L1, IN1_L2, IN1_L3 pin states,
respectively. Similarly, when IN2_n is selected (INSEL = 101b), the status register bits return the IN2_L1,
IN2_L2, IN2_L3 pin states, respectively.
DAC
2
The SM5330A has two D/A converters controlled using the I
C BUS. The control register DAC0 bit controls
the DAC_0 pin output voltage, and the DAC1 bit controls the DAC_1 output voltage.
I/O
The I/O_0 and I/O_1 I/O pins in output mode are n-channel MOS open-drain outputs. Connect pull-up resis-
tance between respective pins and the VCCD pin. Recommendation value of pull-up resistance is 10kΩ. When
these pins are used as inputs, set the outputs “1” (high impedance) in the control register. When these pins are
not used, they should have pull-up connections to VCCD or be connected to DGND.
Power-ON Reset
When power is applied, an internal power-ON reset circuit operates, initializing all internal register settings to
their default settings. Power should be applied simultaneously on all supply pins.
SEIKO NPC CORPORATION —19

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