sm5838a Nippon Precision Circuits Inc, (NPC), sm5838a Datasheet - Page 6

• Manufacturer Part Number: sm5838a
• Description: 5120 ? 8-bit Synchronous Fifo
• Manufacturer: Nippon Precision Circuits Inc, (NPC)

FUNCTIONAL DESCRIPTION
At power-ON reset, device operation can become irregular during the interval when the control circuits are
being reset. After power-ON reset is released, this can take up to several 10s of ms in some cases.
Write Reset Cycle, Read Reset Cycle
After power-ON, the write address pointer and read address pointer positions are undefined. Accordingly, it is
necessary to initialize the pointers using a write reset cycle and read reset cycle, respectively.
A write reset cycle (read reset cycle) is valid when RW (RR) goes LOW for an interval that satisfies both the
CLK rising edge setup time (t
simultaneously with a write cycle (read cycle). If the cycles are not simultaneous, then the write reset cycle
(read reset cycle) is completed at the start of the next write cycle (read cycle).
Write reset cycle
Read reset cycle
Note the even if a reset period (t
tion does take place.
DOUT
CLK
DIN
RW
CLK
RR
(n-1)
(n-1)
t
t
CKW
t
RH
t
CKW
t
RH
A
n cycle
n cycle
t
t
t
CKW
t
DS
t
RS
CKW
(n)
RS
(n)
RS
) and hold time (t
RW
, t
RR
t
DH
t
t
A
OH
) is zero length in the write reset and read reset cycles, the reset opera-
reset cycle
reset cycle
t
RW
t
RR
RH
SM5838AS
). Note that a write reset cycle (read reset cycle) can occur
(0)
t
RH
t
t
t
RH
A
OH
0 cycle
0 cycle
t
t
DS
t
RS
(0)
RS
(0)
WE="L"
RE="L" , OE="L"
t
DH
t
t
A
OH
SEIKO NPC CORPORATION —6
1 cycle
1 cycle
(1)
(1)