SST39VF6401 Silicon Storage Technology, Inc., SST39VF6401 Datasheet
SST39VF6401
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SST39VF6401 Summary of contents
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... Hardware Reset Pin (RST#) • Security-ID Feature – SST: 128 bits; User: 128 bits PRODUCT DESCRIPTION The SST39VF6401 and SST39VF6402 devices are 4M x16 respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SST’s proprietary, high perfor- mance CMOS SuperFlash technology. The split-gate cell ...
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... Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 µs. See Figures 5 and 6 for WE# and CE# controlled Pro- gram operation timing diagrams and Figure 20 for flow- charts. During the Program operation, the only valid reads are Data# Polling and Toggle Bit ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 To resume Sector-Erase or Block-Erase operation which has been suspended the system must issue Erase Resume command. The operation is executed by issuing one byte command sequence with Erase Resume command (30H) at any address in the last Byte sequence. ...
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... Hardware Block Protection The SST39VF6402 support top hardware block protection, which protects the top 32 KWord block of the device. The SST39VF6401 support bottom hardware block protection, which protects the bottom 32 KWord block of the device. The Boot Block address ranges are described in Table 2. ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Product Identification The Product Identification mode identifies the devices as the SST39VF6401 or SST39VF6402, and manufacturer as SST. This mode may be accessed software opera- tions. Users may use the Software Product Identification operation to identify the part (i.e., using the device ID) when using multiple manufacturers in the same socket ...
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... FIGURE 2: Pin Assignments for 48-lead TSOP ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus X-Decoder Address Buffer & Latches Control Logic Standard Pinout Top View Die Up 6 SST39VF6401 / SST39VF6402 SuperFlash Memory Y-Decoder I/O Buffers and Data Latches 1223 B1.0 ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 FIGURE 3: pin assignments for 48-ball TFBGA ©2008 Silicon Storage Technology, Inc. TOP VIEW (balls facing down) SST39VF6401/6402 A13 A12 A14 A15 A16 NC DQ15 A10 A11 DQ7 DQ14 DQ13 DQ6 ...
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... IL IH OUT High High OUT High OUT SST39VF6401 / SST39VF6402 T4.2 1223(03) Address Sector or block address, XXH for Chip-Erase See Table 6 T5.0 1223(03) S71223(03)-00-EOL 6/08 ...
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... XXH 2AAAH 55H 5555H 90H 2AAAH 55H 5555H 98H 2AAAH 55H 5555H F0H , but no other value, for Command sequence for SST39VF6401/6402. address lines address lines - (Address range = 000000H to 000007H (Address range = 000010H to 000017H Locked ...
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... Maximum time out for buffer program 2 25H 0001H Maximum time out for individual Sector/Block-Erase 2 26H 0001H Maximum time out for Chip-Erase 2 TABLE 9: Device Geometry Information for SST39VF6401/6402 Address Data Data 27H 0017H Device size = 2 28H 0001H Flash Device Interface description; 0001H = x16-only asynchronous interface ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...
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... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a END higher minimum specification. ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 1 = 2.7-3.6V DD Limits Min Max ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 AC CHARACTERISTICS TABLE 14: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output ...
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... XX55 XXA0 DATA SW1 SW2 WORD (ADDR/DATA µs prior to and 1 µs after the command sequence but no other value IH 14 SST39VF6401 / SST39VF6402 OHZ T CHZ T OH HIGH-Z DATA VALID 1223 F03.EOL T BP 1223 F04.EOL S71223(03)-00-EOL 6/08 ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 ADDRESS A 5555 MS CE CPH OE# WE# XXAA DQ 15-0 SW0 Note Most significant address WP# must be held in proper logic state (V X can be V FIGURE 6: CE# Controlled Program Cycle Timing Diagram ADDRESS A MS-0 CE# ...
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... XX80 XXAA XX55 SW1 SW2 SW3 SW4 for SST39VF6401/6402 ) 1 µs prior to and 1 µs after the command sequence but no other value IH 16 SST39VF6401 / SST39VF6402 T OES TWO READ CYCLES 1223 F07.EOL WITH SAME OUTPUTS T SCE 5555 XX10 SW5 1223 F08.EOL S71223(03)-00-EOL 6/08 ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 5555 2AAA ADDRESS A MS-0 CE# OE WE# XXAA DQ 15-0 SW0 Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchageable as long as minimum timings are met. (See Table 17 Block Address Most significant address ...
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... but no other value IH 5555 T IDA T WPH T AA XX55 XX98 SW1 SW2 µs prior to and 1 µs after the command sequence but no other value IH 18 SST39VF6401 / SST39VF6402 0001 Device ID 1223 F11.EOL 1223 F12.1 S71223(03)-00-EOL 6/08 ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET 5555 ADDRESS A 14-0 XXAA DQ 15-0 CE# OE WE# SW0 Note: WP# must be held in proper logic state (V X can be V FIGURE 14: Software ID Exit/CFI Exit THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ADDRESS A ...
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... CE#/OE# FIGURE 16: RST# Timing Diagram (When no internal operation is in progress RST# CE#/OE# FIGURE 17: RST# Timing Diagram (During Program or Erase operation) ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 T RHR T RY End-of-Write Detection (Toggle-Bit) 20 1223 F22.1 1223 F23.0 ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 18: AC Input/Output Reference Waveforms TO DUT FIGURE 19: A Test Load Example ©2008 Silicon Storage Technology, Inc. V REFERENCE POINTS IT ) for a logic “1” and V (0 ...
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... EOL Data Sheet FIGURE 20: Word-Program Algorithm ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Start Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XXA0H Address: 5555H Load Word Address/Word Data Wait for end of ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 21: Wait Options ©2008 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match? Yes Program/Erase Completed ...
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... Address: 5555H Wait T IDA Read CFI data FIGURE 22: Software ID/CFI Entry Command Flowcharts ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Sec ID Query Entry Software Product ID Entry Command Sequence Command Sequence Load data: XXAAH Load data: XXAAH ...
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... Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Software ID Exit/CFI Exit/Sec ID Exit Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XXF0H Address: 5555H Return to normal FIGURE 23: Software ID/CFI Exit Command Flowcharts ©2008 Silicon Storage Technology, Inc. Command Sequence ...
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... Load data: XX10H Address: 5555H Wait T SCE Chip erased to FFFFH FIGURE 24: Erase Command Sequence ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF6401 / SST39VF6402 Sector-Erase Command Sequence Command Sequence Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH ...
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... PRODUCT ORDERING INFORMATION SST 39 VF 6402 - XXXX - XXX Valid Combinations for SST39VF6401 SST39VF6401-70-4C-EKE SST39VF6401-70-4C-B1KE SST39VF6401-70-4I-EKE SST39VF6401-70-4I-B1KE Valid Combinations for SST39VF6402 SST39VF6402-70-4C-EKE SST39VF6402-70-4C-B1KE SST39VF6402-70-4I-EKE SST39VF6402-70-4I-B1KE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. © ...
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... All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. FIGURE 25: 48-lead Thin Small Outline Package (TSOP) 12mm x 20mm SST Package Code: EK ©2008 Silicon Storage Technology, Inc. 16 Mbit / 32 Mbit Multi-Purpose Flash Plus 18.50 18.30 20.20 19.80 28 SST39VF6401 / SST39VF6402 1.05 0.95 0.50 BSC 0.27 0.17 12.20 11.80 0.15 0.05 DETAIL 1 ...
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... FIGURE 26: 48-ball Thin-profile, Fine-pitch Ball Grid Array (TFBGA) 8mm x 10mm SST Package Code: B1K TABLE 16: Revision History Number 00 • Initial release of SST39VF6401/SST39VF6402 EOL Data Sheet Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036 ©2008 Silicon Storage Technology, Inc. BOTTOM VIEW 4.00 6.00 ± 0.20 ...