S25FL004A Meet Spansion Inc., S25FL004A Datasheet - Page 11

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S25FL004A

Manufacturer Part Number
S25FL004A
Description
4-megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
Manufacturer
Meet Spansion Inc.
Datasheet

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6. Spansion SPI Modes
July 9, 2007 S25FL004A_00_B3
A microcontroller can use either of its two SPI modes to control Spansion SPI Flash memory devices:
Input data is latched in on the rising edge of SCK, and output data is available from the falling edge of SCK for
both modes.
When the bus master is in standby mode, SCK is as shown in
Note
The Write Protect (W#) and Hold (HOLD#) signals should be driven high (logic level 1) or low (logic level 0) as appropriate.
Mode 0
Mode 3
CPOL = 0, CPHA = 0 (Mode 0)
CPOL = 1, CPHA = 1 (Mode 3)
SCK remains at 0 for (CPOL = 0, CPHA = 0 Mode 0)
SCK remains at 1 for (CPOL = 1, CPHA = 1 Mode 3)
CS3
SPI Interface with
(CPOL, CPHA) =
Bus Master
(0, 0) or (1, 1)
CPOL
CS2
0
1
CS1
CPHA
0
1
Figure 6.1 Bus Master and Memory Devices on the SPI Bus
SCK
SCK
CS#
D a t a
SO
SI
SO
SI
SCK
S h e e t
Figure 6.2 SPI Modes Supported
MSB
CS#
SCK SO SI
S25FL004A
SPI Memory
Device
W# HOLD#
CS#
SCK SO SI
Figure 6.2
SPI Memory
Device
W# HOLD#
for each of the two modes:
MSB
CS#
SCK SO SI
SPI Memory
Device
W# HOLD#
11

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