cs4344 Cirrus Logic, Inc., cs4344 Datasheet - Page 16
cs4344
Manufacturer Part Number
cs4344
Description
10-pin, 24-bit, 192 Khz Stereo D/a Converters
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS4344.pdf
(24 pages)
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16
When changing clock ratio or sample rate it is recommended that zero data (or near zero data) be present on SDIN
for at least 10 LRCK samples before the change is made. During the clocking change the DAC outputs will always
be in a zero data state. If no zero audio is present at the time of switching, a slight click or pop may be heard as the
DAC output automatically goes to it’s zero data state.
USER: Rem ove
MCLK
MCLK/LRCK ratio
USER: Rem ove
VQ and outputs
USER: change
ram p down
LRCK
Figure 12. CS4344/5/6/8 Initialization and Power-down Sequence
SCLK m ode = internal
Norm al Operation
USER: No SCLK
Analog Output
De-em phasis
is Generated
available
MCLK/LRCK Ratio Detection
VQ and outputs ram p up
USER: Apply Power
USER: Apply MCLK
USER: Apply LRCK
Power-Down State
VQ and outputs low
W ait State
SCLK m ode = external
USER: Applied SCLK
Norm al Operation
Analog Output
De-em phasis
is Generated
not available
VQ and outputs
MCLK/LRCK ratio
USER: Rem ove
USER: change
ram p down
LRCK
USER: Rem ove
CS4344/5/6/8
MCLK
DS613F1