cs47028-dqz Cirrus Logic, Inc., cs47028-dqz Datasheet - Page 21
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cs47028-dqz
Manufacturer Part Number
cs47028-dqz
Description
System-on- A-chip Asoc Processors
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS47028-DQZ.pdf
(40 pages)
5.10 Digital Switching Characteristics — Serial Control Port - SPI Master Mode
DS787PP5
SCP_CLK frequency
EE_CS falling to SCP_CLK rising
SCP_CLK low time
SCP_CLK high time
Setup time SCP_MISO input
Hold time SCP_MISO input
SCP_CLK low to SCP_MOSI output valid
SCP_CLK low to EE_CS falling
SCP_CLK low to EE_CS rising
Bus free time between active EE_CS
SCP_CLK falling to SCP_MOSI output high-Z
SCP_MISO
SCP_MOSI
1. f
2. See
3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a
SCP_CLK
maximum speed of the communication port may be limited by the firmware application.
tested parameter
EE_CS
spisck
Section
indicates the maximum speed of the hardware. The system designer should be aware that the actual
t
spicsl
5.7.
Parameter
1,2
1/
f
spisck
t
spicss
Figure 8.
A6
t
spidsu
0
3
A5
t
1
spidh
Serial Control Port - SPI Master Mode Timing
Copyright 2011 Cirrus Logic
2
t
spickh
t
spickl
Symbol
A0
t
t
t
t
f
t
t
t
t
t
spidsu
spidov
t
6
spisck
spicss
spickh
spicsh
spicsx
spickl
spicsl
spidh
spidz
t
spidov
R/W
7
Min
18
18
9
5
7
-
-
-
-
-
MSB
MSB
0
(SCP_CLK PERIOD)/2
(SCP_CLK PERIOD)/2
5
11*DCLKP +
11*DCLKP +
3*DCLKP
Typical
6
LSB
LSB
Audio SOC Processor Family
7
CS470xx Data Sheet
t
spidz
t
t
spicsx
F
spicsh
Max
xtal
20
8
-
-
-
-
-
-
-
-
/2
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21