tn87c196kd20 ETC-unknow, tn87c196kd20 Datasheet - Page 25

• Manufacturer Part Number: tn87c196kd20
• Description: Commercial Chmos Microcontroller
• Manufacturer: ETC-unknow

8XC196KC TO 8XC196KD DESIGN
CONSIDERATIONS
1. Memory Map. The 8XC196KD has 1024 bytes of
2. The vertical window scheme has been extended
3. IOC3.1 controls the CLKOUT signal. This bit must
4. The 87C196KD has a different autoprogramming
8XC196KD ERRATA
1. 83C196KD can possibly miss interrupts on P0.7.
DATA SHEET REVISION HISTORY
This data sheet is valid for devices with a ``D'' and
``E'' at the end of the topside tracking number. Data
sheets are changed as new device information be-
comes available. Verify with your local Intel sales
office that you have the latest version before finaliz-
ing a design or ordering devices.
The following are important differences between the
272145-002 and 272145-003 data sheets:
1. I
2. T
3. An errata with 83C196KD P0.7 EXTINT was add-
The following are important differences between the
272145-001 and 272145-002 data sheets:
The following are important differences between the
272145-004 and 272145-005 datasheets:
1. Package prefix variables have been changed.
1. Added 20 MHz specifications.
2. Added 80-lead SQFP package pinout.
RAM/SFRs and 32K of OTPROM. The extra 512
bytes of RAM reside in locations 0200H to
03FFH, and the extra 16 Kbytes of OTPROM re-
side in locations 6000H to 9FFFH. On the
87C196KC these locations are always external,
so KC code may have to be modified to run on
the KD.
to include all on-chip RAM.
be 0 to enable CLKOUT.
algorithm to support 32K of on-chip OTPROM.
See techbit MC0893.
was misnamed. It is renamed I
cations are not necessary for high-speed system
designs.
ed to the errata section.
Variables are now indicated with an "x".
IL1
LLYV
specification (logic 0 input current in reset)
and T
LLGV
were removed. These specifi-
IL2
.
10. Added I
11. Changed T
12. Changed T
13. Changed T
14. Changed T
15. Changed T
16. Changed T
17. Added T
18. Changed T
19. Changed T
20. Changed I
21. Changed I
22. Removed NMI from list of standard inputs.
23. Updated I
24. Updated note under DC EPROM Programming
25. Changed I
3. Changed QFP Package
4. Changed V
5. Changed I
6. Changed I
7. Changed I
8. Changed I
9. Changed I
42 C/W.
65 mA from 50 mA.
to 75 mA from 70 mA.
from 15 mA.
from 30 mA.
15 A.
T
T
from
T
a
a
3 s.
5.5V.
Characteristics.
mA from
A from
OSC
OSC
OSC
15 from
20 from
b
b
b
b
10.
PD
HAHBV
a
45 from T
35 from T
25 from T
b
CC
CC
CC
IDLE
PD
IH1
IH1
IDLE
100 A.
HYS
a
a
SAM
LI1
Maximum specification.
CLDV
LLAX
RHAX
CHWH
SAM
6 mA.
HALAZ
HALBZ
10.
15.
and I
Typical specification at 16 MHz to
Maximum specification at 16 MHz
Typical specification to 8 A from
test condition to V
maximum specification to
Maximum specification to 25 mA
maximum specification to
for 8-bit mode to 1 s from 2 s.
to 300 mV from 150 mV.
Typical specification to 17 mA
Maximum specification.
Minimum specification to
Maximum specification to
for 10-bit mode to 1
Minimum specification to
8XC196KD/8XC196KD20
Minimum specification to
IDLE
OSC
OSC
OSC
Maximum specification to
Maximum specification to
vs frequency graph.
b
b
b
50.
40.
30.
JA
to 56 C/W from
IN
e
2.4V from
s from
a
b
200
b
12
25
5