cs8413-cs Cirrus Logic, Inc., cs8413-cs Datasheet - Page 5

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cs8413-cs

Manufacturer Part Number
cs8413-cs
Description
96 Khz Digital Audio Receivers
Manufacturer
Cirrus Logic, Inc.
Datasheet

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SWITCHING CHARACTERISTICS - SERIAL PORTS
(T
Notes: 6. The output word rate, OWR, refers to the frequency at which an audio sample is output from the part.
DS240F1
SCK Frequency
SCK falling to FSYNC delay Master Mode
SCK Pulse Width Low
SCK Pulse Width High
SCK rising to FSYNC edge delay Slave Mode (Notes 7 and 8)
FSYNC edge to SCK rising setup Slave Mode (Notes 7 and 8)
SCK falling (rising) to SDATA valid
C, U, CBL valid to FSYNC edge CS8414
MCK to FSYNC edge delay
A
= 25 °C; VD+, VA+ = 5V ± 5%; Inputs: Logic 0 = DGND, Logic 1 = VD+; C
7. In Master mode, SCK and FSYNC are outputs. In Slave mode, they are inputs. In the CS8413, control
8. The table above assumes data is output on the falling edge and latched on the rising edge. With the
FSYNC
SDATA
FSYNC
SDATA
(A stereo pair is two audio samples.) Therefore, in Master mode, there are always 32 SCK periods in
one audio sample. In Slave mode, exactly 32 SCK periods per audio sample must be provided in most
serial port formats. Therefor, if SCK is 128 x Fs, then SCK must be gated to provide exactly 32 periods
per audio sample.
reg. 2 bit 1, MSTR, selects master. In the CS8414, formats 1, 3 and 9 are slaves.
CS8413 the edge is selectable. The table is defined for the CS8413 with control reg. 2 bit 0, SCED, set
to one, and for the CS8414 in formats 2, 3, 5, 6 and 7. For the other formats, the table and figure edges
must be reversed (i.e. “rising” to “falling” and vice versa.)
SCK
SCK
Serial Output Timing - Slave Mode
t
sfds
t
sfds
Parameters
(Mode 1)
t
t
t
fss
(Mode 3)
fss
ssv
MSB
Master Mode (Notes 6 and 7)
Slave Mode
t
t
sckl
sckl
t
Slave Mode
Slave Mode
FSYNC from RXN/RXP
ssv
MSB
t
t
sckh
sckh
(Notes 7 and 8)
(Note 7)
(Note 7)
(Note 7)
(Note 8)
(Note 8)
(Modes 2,3,5,6,
7,10,12, and 13)
(Modes 0,1,4,
8,9, and 11)
Symbol
FSYNC
SDATA
t
t
t
t
t
t
f
sfdm
t
sckh
t
C, U
SCK
SCK
sfds
cuvf
sckl
mfd
ssv
sck
fss
FSYNC
MCK
t
sfdm
FSYNC Generated From
t
ssv
Master Mode & C, U Port
OWRx32
Serial Output Timing -
Received Data
Min
-20
40
40
20
20
L
-
-
-
-
= 20 pF)
t
cuvf
t
mfd
OWRx32
1/f
CS8413 CS8414
Typ
15
-
-
-
-
-
-
-
sck
128 x F
Max
20
20
-
-
-
-
-
-
-
S
Units
Hz
Hz
ns
ns
ns
ns
ns
ns
ns
s
5

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