ad53519 Analog Devices, Inc., ad53519 Datasheet - Page 6

• Manufacturer Part Number: ad53519
• Description: Dual Ultrafast Voltage Comparator
• Manufacturer: Analog Devices, Inc.

AD53519
TIMING INFORMATION
Figure 3
Terms used in timing diagrams:
REV. Pr J July 22, 2002
/LATCH ENABLE
LATCH ENABLE
DIFFERENTIAL
INPUT VOLTAGE
t
t
t
t
t
t
t
t
t
V
PDH
PDL
PLOH
PLOL
H
PL
S
R
F
OD
Q OUTPUT
/Q OUTPUT
INPUT TO OUTPUT HIGH
DELAY
INPUT TO OUTPUT LOW
DELAY
LATCH ENABLE TO
OUTPUT HIGH DELAY
LATCH ENABLE TO
OUTPUT LOW DELAY
MINIMUM HOLD TIME
MINIMUM LATCH
ENABLE PULSE WIDTH
MINIMUM SETUP TIME
OUTPUT RISE TIME
OUTPUT FALL TIME
VOLTAGE OVERDRIVE
The timing diagram is presented to illustrate the AD53519 compare and latch features.
PRELIMINARY TECHNICAL DATA
V IN
SYSTEM TIMING DIAGRAM
The propagation delay measured from the time the input signal crosses the reference (r
the input offset voltage) to the 50% point of an output LOW to HIGH transition
The propagation delay measured from the time the input signal crosses the reference (r
the input offset voltage) to the 50% point of an output HIGH to LOW transition
The propagation delay measure from the 50% point of the Latch Enable signal LOW to
HIGH transition to the 50% point of an output LOW to HIGH transition
The propagation delay measured from the 50% point of the Latch Enable signal LOW
to HIGH transition to the 50% point of an output HIGH to LOW transition
The minimum time after the negative transition of the Latch Enable signal that the
input signal must remain unchanged in order to be acquired and held at the outputs
The minimum time that the Latch Enable signal must be HIGH in order to acquire and
input signal change
The minimum time before the negative transition of the Latch Enable signal that an
input signal change must be present in order to be acquired and held at the outputs
The amount of time required to transition from a LOW to HIGH output as measured at
the 20 and 80% points
The amount of time required to transition from a HIGH to LOW output as measured at
the 20 and 80% points
The difference between the differential input and reference input voltages
t S
V OD
t PDL
t PDH
t H
- 6 -
t R
t F
t PL
t PLOH
t PLOL
50%
V REF ± V OS
50%
50%