irs2548d International Rectifier Corp., irs2548d Datasheet - Page 14

• Manufacturer Part Number: irs2548d
• Description: Smps/led Driver Pfc + Half-bridge Control Ic
• Manufacturer: International Rectifier Corp.

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Run Mode (RUN)
After the VCC supply comes up and the IC starts,
the IC enters run mode. The operating frequency is
set to the minimum limit, which is programmed by
the external resistor (RFMIN) at the FMIN pin. If the
IRS2548D is used in a series resonant configuration
the frequency can be increased to regulate the
system output voltage. This can be implemented by
sinking additional current from the FMIN pin with an
additional
arrangement.
It should be noted that the FMIN pin input is very
sensitive to noise and that traces connected to this
pin should be very short and should be kept away
from high voltage switching nodes; HO, VB and VS.
An additional RC filter can also be added to the
FMIN pin if necessary as shown in the application
schematic on page 1.
Should hard-switching occur at the half-bridge at
any time or excessive current be drawn due to a
fault condition, the voltage across the current
sensing resistor (RCS) will exceed the internal
threshold of 1.2 volts (VCSTH+) and the fault
counter will begin counting (see Figure 3).
CS Fault Mode
The current sense function will force the IC to enter
fault mode only after the voltage at the CS pin has
been
(nEVENTS) consecutive cycles of LO. The voltage
at the CS pin is AND-ed with LO (see Figure 7) so it
will work with pulses that occur during the LO on-
time or DC.
consecutive, then the internal fault counter will
count back down each cycle when there is no fault.
Should an over-current fault occur only for a few
cycles and then not occur again, the counter will
eventually reset to zero.
CS
LO
1.25V
Figure 3: Fault counter timing diagram.
greater
resistor,
If the over-current faults are not
than
65 Cycles
Run Mode
opto
1.2V
(VCSTH+)
isolator
Fault Mode
or
for
other
65
14
DIM Mode (ENN Input)
PWM dimming can be implemented via the ENN pin.
If the voltage input to the ENN pin exceeds 2V during
run mode, the IC enters dim mode, LO, HO and PFC
gate drivers go to the low state. This is similar to fault
mode except that the COMP pin is not internally
pulled to COM and so the COMP capacitor retains it's
voltage. This allows the PFC to start up rapidly with
the on time close to where it was before the ENN
signal shut off the IC outputs. When ENN goes below
1.5V and therefore the bus voltage can be maintained
while the PFC gate drive being held low during the
periods where the LED load is not being driven. This
minimizes ripple generated on the DC bus during
PWM dimming.
© 2011 International Rectifier
IRS2548D