ltc1871ems-trpbf Linear Technology Corporation, ltc1871ems-trpbf Datasheet - Page 8

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ltc1871ems-trpbf

Manufacturer Part Number
ltc1871ems-trpbf
Description
Wide Input Range, No Rsense Current Mode Boost, Flyback And Sepic Controller
Manufacturer
Linear Technology Corporation
Datasheet
LTC1871
BLOCK DIAGRAM
OPERATION
Main Control Loop
The LTC1871 is a constant frequency, current mode con-
troller for DC/DC boost, SEPIC and fl yback converter ap-
plications. The LTC1871 is distinguished from conventional
current mode controllers because the current control loop
can be closed by sensing the voltage drop across the power
MOSFET switch instead of across a discrete sense resistor,
as shown in Figure 2. This sensing technique improves
effi ciency, increases power density, and reduces the cost
of the overall solution.
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power MOSFET
8
1.230V
MODE/SYNC
INTV
FREQ
I
FB
4
5
3
TH
2
8
1.230V
CC
2.00V
85mV
+
0.6V
5.2V
+
+
+
g
m
V-TO-I
LDO
OV
EA
UV
0.30V
1.230V
I
OSC
TO
START-UP
CONTROL
50k
+
COMPENSATION
COMPARATOR
SLOPE
SLOPE
V-TO-I
BURST
BIAS
OSC
V
IN
is turned on when the oscillator sets the PWM latch and
is turned off when the current comparator C1 resets the
latch. The divided-down output voltage is compared to an
internal 1.230V reference by the error amplifi er EA, which
outputs an error signal at the I
I
When the load current increases, a fall in the FB voltage
relative to the reference voltage causes the I
which causes the current comparator C1 to trip at a higher
peak inductor current value. The average inductor current
will therefore rise until it equals the load current, thereby
maintaining output regulation.
TH
pin sets the current comparator C1 input threshold.
1.230V
I
V
LOOP
REF
START-UP
BIAS AND
CONTROL
PWM LATCH
R
S
COMPARATOR
CURRENT
Q
LOGIC
C1
+
C2
INTV
+
GND
TH
R
LOOP
CC
pin. The voltage on the
SENSE
1871 BD
1.248V
GATE
RUN
GND
V
10
1
9
7
6
IN
TH
pin to rise,
1871fe

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