ltc1069-6 Linear Technology Corporation, ltc1069-6 Datasheet - Page 6

• Manufacturer Part Number: ltc1069-6
• Description: Single Supply, Very Low Power, Elliptic Lowpass Filter
• Manufacturer: Linear Technology Corporation

APPLICATIONS
LTC1069-6
PIN
NC (Pins 3, 6): No Connection. Pins 3 and 6 are not
connected to any internal circuitry; they should be tied to
ground.
V
connected to the inverting input of an op amp through a
50k resistor.
CLK (Pin 5): Clock Input Pin. Any TTL or CMOS clock
source with a square wave output and 50% duty cycle
( 10%) is an adequate clock source for the device. The
power supply for the clock source should not necessarily
be the filter’s power supply. The analog ground of the filter
should be connected to the clock’s ground at a single point
Temperature Behavior
The power supply current of the LTC1069-6 has a positive
temperature coefficient. The GBW product of its internal
op amps is nearly constant and the speed of the device
does not degrade at high temperatures. Figures 4a, 4b and
4c show the behavior of the passband of the device for
various supplies and temperatures. The filter has a pass-
band behavior which is temperature independent.
6
IN
U
(Pin 4): Filter Input Pin. The Filter Input pin is internally
FUNCTIONS
Figure 3. Connections for Dual Supply Operation
U
STAR
SYSTEM
GROUND
V
0.1 F
V
+
IN
ANALOG GROUND PLANE
U
U
1
2
3
4
GROUND
DIGITAL
PLANE
AGND
V
NC
V
IN
INFORMATION
+
U
LTC1069-6
V
CLK
OUT
NC
V
–
W
SOURCE
CLOCK
8
7
6
5
V
1k
OUT
1069-6 F03
0.1 F
V
–
U
only. Table 1 shows the clock’s low and high level thresh-
old value for a dual or single supply operation. A pulse
generator can be used as a clock source provided the high
level ON time is greater than 0.42 s (V
waves less than 100kHz are not recommended for clock
frequencies because, excessive slow clock rise or fall
times generate internal clock jitter. The maximum clock
rise or fall time is 1 s. The clock signal should be routed
from the right side of the IC package to avoid coupling into
any input or output analog signal path. A 1k resistor
between the clock source and the Clock Input (Pin 5) will
slow down the rise and fall times of the clock to further
reduce charge coupling (Figure 1).
Table 1. Clock Source High and Low Thresholds
POWER SUPPLY
Dual Supply = 5V
Single Supply = 10V
Single Supply = 5V
Single Supply = 3.3V
V
filter, and it can source 8mA or sink 1mA. The total
harmonic distortion of the filter will degrade when driving
coaxial cables or loads less than 20k without an output
buffer.
OUT
(Pin 8): Filter Output Pin. Pin 8 is the output of the
– 1
– 2
2
1
0
1
V
V
S
IN
3
= SINGLE 3V
= 0.5V
5
RMS
– 40 C
7
FREQUENCY (kHz)
Figure 4a
HIGH LEVEL
9
85 C
11
1.5V
6.5V
1.5V
1.2V
f
f
CLK
CUTOFF
13
= 500kHz
= 10kHz
15
17
1069-6 F04a
19
S
21
LOW LEVEL
= 5V). Sine
0.5V
5.5V
0.5V
0.5V