ltc2220cup-trpbf Linear Technology Corporation, ltc2220cup-trpbf Datasheet - Page 20

• Manufacturer Part Number: ltc2220cup-trpbf
• Description: Ltc2221 - 12-bit, 135msps Adcs
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
LTC2220/LTC2221
the 2V range or ±0.25V for the 1V range, around a
common mode voltage of 1.6V. The V
60) may be used to provide the common mode bias level.
V
to set the DC input level or as a reference level to an op amp
differential driver circuit. The V
ground close to the ADC with a 2.2µF or greater capacitor.
Input Drive Impedance
As with all high performance, high speed ADCs, the
dynamic performance of the LTC2220/LTC2221 can be
influenced by the input drive circuitry, particularly the
second and third harmonics. Source impedance and input
reactance can influence SFDR. At the falling edge of ENC,
the sample-and-hold circuit will connect the 1.6pF sam-
pling capacitor to the input pin and start the sampling
period. The sampling period ends when ENC rises, holding
the sampled input on the sampling capacitor. Ideally the
input circuitry should be fast enough to fully charge
the sampling capacitor during the sampling period
1/(2F
incomplete settling may degrade the SFDR. The sampling
glitch has been designed to be as linear as possible to
minimize the effects of incomplete settling.
For the best performance, it is recommended to have a
source impedance of 100Ω or less for each input. The
source impedance should be matched for the differential
inputs. Poor matching will result in higher even order
harmonics, especially the second.
Input Drive Circuits
Figure 3 shows the LTC2220/LTC2221 being driven by an
RF transformer with a center tapped secondary. The sec-
ondary center tap is DC biased with V
input signal at its optimum DC level. Terminating on the
transformer secondary is desirable, as this provides a
common mode path for charging glitches caused by the
sample and hold. Figure 3 shows a 1:1 turns ratio trans-
former. Other turns ratios can be used if the source
impedance seen by the ADC does not exceed 100Ω for each
ADC input. A disadvantage of using a transformer is the
loss of low frequency response. Most small RF transform-
ers have poor performance at frequencies below 1MHz.
20
CM
can be tied directly to the center tap of a transformer
ENCODE
); however, this is not always possible and the
U
U
CM
pin must be bypassed to
W
CM
CM
, setting the ADC
output pin (Pin
U
Figure 4 demonstrates the use of a differential amplifier to
convert a single ended input signal into a differential input
signal. The advantage of this method is that it provides low
frequency input response; however, the limited gain bandwidth
of most op amps will limit the SFDR at high input frequencies.
Figure 5 shows a single-ended input circuit. The imped-
ance seen by the analog inputs should be matched. This
circuit is not recommended if low distortion is required.
The 25Ω resistors and 12pF capacitor on the analog inputs
serve two purposes: isolating the drive circuitry from the
sample-and-hold charging glitches and limiting the
wideband noise at the converter input. For input frequen-
cies higher than 100MHz, the capacitor may need to be
decreased to prevent excessive signal loss.
ANALOG
Figure 4. Differential Drive with an Amplifier
AMPLIFIER = LTC6600-20, LT1993, ETC.
INPUT
ANALOG
ANALOG
INPUT
INPUT
Figure 3. Single-Ended to Differential
Conversion Using a Transformer
0.1µF
DIFFERENTIAL
T1 = MA/COM ETC1-1T
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
Figure 5. Single-Ended Drive
HIGH SPEED
AMPLIFIER
0.1µF
+
CM
–
1:1
T1
1k
–
+
25Ω
25Ω
3pF
1k
25Ω
25Ω
0.1µF
25Ω
25Ω
0.1µF
25Ω
25Ω
2.2µF
12pF
12pF
3pF
2.2µF
V
A
A
A
A
2.2µF
12pF
CM
IN
IN
IN
IN
V
A
A
A
A
V
+
+
–
–
A
A
A
A
CM
IN
IN
IN
IN
CM
IN
IN
IN
IN
+
+
–
–
+
+
–
–
LTC2220/
LTC2221
LTC2220/
LTC2221
LTC2220/
LTC2221
22201 F05
22201 F04
22201 F03
22201fa