ds4420nt-r Maxim Integrated Products, Inc., ds4420nt-r Datasheet - Page 6

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ds4420nt-r

Manufacturer Part Number
ds4420nt-r
Description
Ds4420 I?c Programmable Gain Amplifier For Audio Applications
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The key features of the DS4420 are illustrated in the
Block Diagram .
The DS4420 is controlled through the I
face. Gain, mute, and standby settings all reside in one
control register located at memory address F8h (see
Figure 1). Writes to other memory addresses are invalid.
The gain is adjustable from -35dB to +25dB in 3dB
increments. The gain is determined by the five LSBs of
the control register as shown in Figure 1. Gain settings
greater than 14h are invalid.
The DS4420 is placed in mute mode by setting the mute
bit located in the control register (see Figure 1). When in
this mode, the output of the amplifier is muted and is
independent of the gain setting. The input-to-output
attenuation is specified in the Electrical Characteristics
table as A
Standby mode is entered by setting the standby control
bit (see Figure 1). Setting the standby control bit mutes
the output of the amplifier and places the DS4420 into a
I
for Audio Applications
6
2
C Programmable-Gain Amplifier
_____________________________________________________________________
PIN
EP
10
11
12
13
14
1
2
3
4
5
6
7
8
9
MUTE
.
AGND
NAME
OUT+
AV
OUT-
GND
SDA
N.C.
SCL
V
IN+
IN-
A2
A1
A0
EP
CC
CC
Detailed Description
Controlling the DS4420
Address Select Inputs—Determine I
I
I
Digital Power-Supply Terminal
Ground
Differential Audio Input Signal
No Connection
Analog Ground (Must be Connected to GND)
Differential Audio Output Signal
Analog Power Supply (Must be Connected to V
Exposed Paddle. Connect to GND and AGND.
2
2
C Serial Clock—Input for I
C Serial Data—Input/Output for I
Programmable Gain
Standby Mode
2
C serial inter-
Mute Mode
2
C Clock
2
C Data
2
C Slave Address. Device address is 1010A
low-current (I
mode, however, standby mode is intended for use when
no input signal is present. While in standby mode, the
DS4420 maintains input and output common-mode bias
voltages. The device produces no audible clicks or
pops when entering or exiting the standby state. The
time required for the output to become active when
exiting standby mode is specified as t
FUNCTION
SDA
SCL
IN+
IN-
CC
)
A0
I
STBY
2
C INTERFACE
A1
GND
A2
) consumption state. Unlike mute
V
CC
3dB
GAIN
STEPS
-35dB
TO +25dB
GAIN
AGND
AV
CC
Pin Description
Block Diagram
DS4420
2
A
PU
1
A
0
.
.
OUT+
OUT-

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