ds4520etrl Maxim Integrated Products, Inc., ds4520etrl Datasheet
ds4520etrl
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ds4520etrl Summary of contents
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... I/O_4 CLOCK GENERATOR I/O_5 I/O_6 CPU SPEED I/O_7 SELECT I/O_8 2 C components from Maxim Integrated Products, Inc., or one of its sublicensed 2 C Patent Rights to use these components ______________________________________________ Maxim Integrated Products 2 C Nonvolatile Features 2 C Bus Ordering Information TEMP RANGE PIN-PACKAGE -40° ...
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I C Nonvolatile I/O Expander Plus Memory ABSOLUTE MAXIMUM RATINGS Voltage SDA, and SCL Pins CC Relative to Ground.............................................-0.5V to +6.0V Voltage on A0, A1, A2, and I/O_n [ Relative to ...
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AC ELECTRICAL CHARACTERISTICS (See Figure +2.7V to +5.5V -40°C to +85°C, unless otherwise noted. Timing referenced PARAMETER SCL Clock Frequency Bus Free Time Between Stop and Start Conditions Hold Time (Repeated) ...
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I C Nonvolatile I/O Expander Plus Memory (V = +5.0V +25°C, unless otherwise noted SUPPLY CURRENT vs. SUPPLY VOLTAGE 2.0 I/O0–I/O7 CONTROL BITS = 0 I/O0–I/O7 PULLUPS DISABLED V = SDA = SCL CC ...
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PIN NAME 1 I/O_0 Input/Output 0. Bidirectional I/O pin. 2 I/O_1 Input/Output 1. Bidirectional I/O pin. 3 I/O_2 Input/Output 2. Bidirectional I/O pin. 4 I/O_3 Input/Output 3. Bidirectional I/O pin. 5 I/O_4 Input/Output 4. Bidirectional I/O pin ...
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I C Nonvolatile I/O Expander Plus Memory Detailed Description The DS4520 contains nine bidirectional, NV, input/out- put (I/O) pins, and a 64-byte EEPROM user memory. The I/O pins and user memory are accessible through C-compatible ...
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Table 1. DS4520 Memory Map ADDRESS TYPE NAME 00h to 3Fh EEPROM User Memory 64 bytes of general-purpose user EEPROM E7h — Reserved E8 to EFh EEPROM Reserved Pullup F0h Enable 0 Pullup F1h Enable 1 SRAM Shadowed ...
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I C Nonvolatile I/O Expander Plus Memory Bit Read: At the end a write operation, the master must release the SDA bus line for the proper amount of setup time before the next rising edge of SCL during ...
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If an incorrect slave address is written, the DS4520 assumes the master is communicating with another I device and ignores the communication until the next start condition is sent. 2 Memory Address: During write operation, the master ...
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I C Nonvolatile I/O Expander Plus Memory TYPICAL WRITE TRANSACTION MSB LSB START R/W READ/ SLAVE WRITE ADDRESS* EXAMPLE TRANSACTIONS (WHEN A0, A1, AND A2 ...