ltc2435-1 Linear Technology Corporation, ltc2435-1 Datasheet - Page 21

• Manufacturer Part Number: ltc2435-1
• Description: 20-bit No Latency Delta Sigma Adcs With Differential Input And Differential Reference
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
When testing EOC, if the conversion is complete (EOC = 0),
the device will exit the sleep state and enter the data output
state. In order to allow the device to return to the sleep
state, CS must be pulled HIGH before the first rising edge
of SCK. In the internal SCK timing mode, SCK goes HIGH
(INTERNAL)
(EXTERNAL)
SDO
SCK
SDO
SCK
CS
CS
CONVERSION
CONVERSION
Hi-Z
SLEEP
U
U
SLEEP
Hi-Z
<t
TEST EOC
EOCtest
Figure 10. External Serial Clock, CS = 0 Operation (2-Wire)
BIT 23
EOC
Figure 11. Internal Serial Clock, Single Cycle Operation
W
BIT 23
EOC
BIT 22
ANALOG INPUT RANGE
BIT 22
ANALOG INPUT RANGE
–0.5V
–0.5V
REF
REF
1, 7, 8, 9, 10, 15, 16
1, 7, 8, 9, 10, 15, 16
U
REFERENCE
0.1V TO V
BIT 21
0.1V TO V
REFERENCE
TO 0.5V
TO 0.5V
SIG
VOLTAGE
BIT 21
VOLTAGE
SIG
1μF
2.7V TO 5.5V
1μF
2.7V TO 5.5V
REF
REF
CC
CC
BIT 20
MSB
BIT 20
MSB
2
3
4
5
6
2
3
4
5
6
DATA OUTPUT
V
REF
REF
IN
IN
GND
V
REF
REF
IN
IN
GND
CC
LTC2435-1
CC
+
–
LTC2435/
LTC2435-1
+
–
LTC2435/
+
–
and the device begins outputting data at time t
the falling edge of CS (if EOC = 0) or t
LOW (if CS is LOW during the falling edge of EOC). The
value of t
the device is using its internal oscillator (F
+
–
BIT 19
BIT 19
SDO
SCK
DATA OUTPUT
SDO
SCK
CS
F
CS
F
O
O
14
13
12
11
14
13
12
11
BIT 18
BIT 18
EOCtest
3-WIRE
SPI INTERFACE
2-WIRE
INTERFACE
V
V
CC
CC
= 50Hz REJECTION (LTC2435)
= EXTERNAL OSCILLATOR
= 60Hz REJECTION (LTC2435)
= 50Hz/60Hz REJECTION (LTC2435-1)
is 23μs (LTC2435), 26μs (LTC2435-1) if
LTC2435/LTC2435-1
= 50Hz REJECTION (LTC2435)
= EXTERNAL OSCILLATOR
= 60Hz REJECTION (LTC2435)
= 50Hz/60Hz REJECTION (LTC2435-1)
BIT 5
BIT 5
EOCtest
V
CC
BIT 0
LSB
10k
BIT 0
LSB
0
= logic LOW or
after EOC goes
EOCtest
CONVERSION
CONVERSION
Hi-Z
TEST EOC
21
2435 F11
24351fb
after
2435 F10
Hi-Z