ltc3827ig-1 Linear Technology Corporation, ltc3827ig-1 Datasheet - Page 11

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ltc3827ig-1

Manufacturer Part Number
ltc3827ig-1
Description
Low Iq, Dual, 2-phase Synchronous Step-down Controller
Manufacturer
Linear Technology Corporation
Datasheet

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OPERATIO
Frequency Selection and Phase-Locked Loop (PLLLPF
and PLLIN/MODE Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency operation
increases efficiency by reducing MOSFET switching losses,
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.
The switching frequency of the LTC3827-1’s controllers
can be selected using the PLLLPF pin.
If the PLLIN/MODE pin is not being driven by an external
clock source, the PLLLPF pin can be floated, tied to
INTV
250kHz, respectively.
A phase-locked loop (PLL) is available on the LTC3827-1
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/MODE pin. In this
case, a series R-C should be connected between the
PLLLPF pin and SGND to serve as the PLL’s loop filter. The
LTC3827-1 phase detector adjusts the voltage on the
PLLLPF pin to align the turn-on of controller 1’s external
top MOSFET to the rising edge of the synchronizing signal.
Thus, the turn-on of controller 2’s external top MOSFET is
180 degrees out of phase to the rising edge of the external
clock source.
The typical capture range of the LTC3827-1’s phase-
locked loop is from approximately 115kHz to 800kHz, with
a guarantee over all manufacturing variations to be be-
tween 140kHz and 650kHz. In other words, the LTC3827-
1’s PLL is guaranteed to lock to an external clock source
whose frequency is between 140kHz and 650kHz.
The typical input clock thresholds on the PLLIN/MODE pin
are 1.6V (rising) and 1.2V (falling).
CC
, or tied to SGND to select 400kHz, 530kHz, or
U
(Refer to Functional Diagram)
Output Overvoltage Protection
An overvoltage comparator guards against transient over-
shoots as well as other more serious conditions that may
overvoltage the output. When the V
10% above its regulation point of 0.800V, the top MOSFET
is turned off and the bottom MOSFET is turned on until the
overvoltage condition is cleared.
Power Good (PGOOD1) Pin
The PGOOD1 pin is connected to an open drain of an
internal N-channel MOSFET. The MOSFET turns on and
pulls the PGOOD1 pin low when the V
within ±10% of the 0.8V reference voltage. The PGOOD1
pin is also pulled low when the RUN1 pin is low (shut
down). When the V
requirement, the MOSFET is turned off and the pin is
allowed to be pulled up by an external resistor to a source
of up to 8.5V.
THEORY AND BENEFITS OF 2-PHASE OPERATION
Why the need for 2-phase operation? Up until the 2-phase
family, constant-frequency dual switching regulators op-
erated both channels in phase (i.e., single-phase opera-
tion). This means that both switches turned on at the same
time, causing current pulses of up to twice the amplitude
of those for one regulator to be drawn from the input
capacitor and battery. These large amplitude current pulses
increased the total RMS current flowing from the input
capacitor, requiring the use of more expensive input
capacitors and increasing both EMI and losses in the input
capacitor and battery.
With 2-phase operation, the two channels of the dual-
switching regulator are operated 180 degrees out of
phase. This effectively interleaves the current pulses
drawn by the switches, greatly reducing the overlap time
where they add together. The result is a significant reduc-
tion in total RMS input current, which in turn allows less
expen sive input capacitors to be used, reduces shielding
requirements for EMI and improves real world operating
efficiency.
FB1
pin voltage is within the ±10%
FB
LTC3827-1
FB1
pin rises more than
pin voltage is not
11
38271fd

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