ltc3770 Linear Technology Corporation, ltc3770 Datasheet - Page 20

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ltc3770

Manufacturer Part Number
ltc3770
Description
Fast No Rsense Step-down Synchronous Controller With Margining, Tracking And Pll
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIO S I FOR ATIO
LTC3770
If you make a change and the input current decreases, then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ∆I
resistance of C
discharge C
the regulator to return V
During this recovery time, V
overshoot or ringing that would indicate a stability prob-
lem. The I
will provide adequate compensation for most applica-
tions. For a detailed explanation of switching control loop
theory see Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: V
±5%, I
timing resistor with V
and choose the inductor for about 40% ripple current at
the maximum V
Selecting a standard value of 1.8µH results in a maximum
ripple current of:
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R
θ
20
JA
V
R
L
∆ =
= 40°C/W) yields a nominal sense voltage of:
SNS(NOM)
ON
=
I
L
(
OUT(MAX)
=
450
(
TH
3 2 5
450
LOAD
(
OUT
kHz
pin external components shown in Figure 12
DS(ON)
.
= (10A)(1.3)(0.0083Ω) = 108mV
kHz
2 5
generating a feedback error signal used by
V
IN
)( )(
2 5
OUT
IN
(ESR), where ESR is the effective series
.
= 10A, f = 450kHz. First, calculate the
)(
.
:
0 4 10
= 5V to 28V (15V nominal), V
)
V
450
.
U
(
V
. ∆I
2 5
1 8
= 0.0083Ω (NOM) 0.010Ω (MAX),
OUT
.
.
ON
kHz
V
µ
LOAD
immediately shifts by an amount
= V
H
A
U
OUT
)
)(
)
OUT
10
1
1
also begins to charge or
OUT
to its steady-state value.
pF
:
2 5
28
2 5
28
)
.
can be monitored for
.
W
=
V
V
V
V
74
⎟ =
⎟ =
k
2 8
1 3
.
.
A
µ
OUT
U
H
= 2.5V
Tying V
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ
and double check the assumed T
Because the top MOSFET is on for such a short time, an
Si4884 R
40°C/W will be sufficient. Checking its power dissipation
at current limit with ρ
The junction temperature will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking on the board will be necessary in
this circuit.
C
85°C. The output capacitors are chosen for a low ESR of
0.013Ω to minimize output voltage changes due to induc-
tor ripple current and load steps. The ripple voltage will be
only:
However, a 0A to 10A load step will cause an output
change of up to:
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 12.
IN
T
T
∆V
∆V
I
P
P
LIMIT
J
J
TOP
is chosen for an RMS current rating of about 3A at
BOT
= 70°C + (1.65W)(40°C/W) = 136°C
= 70°C + (0.62W)(40°C/W) = 95°C
OUT(RIPPLE)
OUT(STEP)
RNG
=
=
( )(
=
1 7 28
DS(ON)(MAX)
28
2 5
.
0 25
28
to 1.1V will set the current sense voltage range
( )
.
.
1 5 0 010
.
V
V
V
28
146
= ∆I
W
– .
( ) ( )
(
11
2 5
V
V
= ∆I
= (2.8A) (0.013Ω) = 36mV
+
.
mV
) ( )(
LOAD
A
2
0 37
150°C
V
.
100°C
L(MAX)
2
11
= 0.0165Ω, C
( ) ( )
11
1 4 0 0165
(ESR) = (10A) (0.013Ω) = 130mV
A
W
)
.
A
= 1.5:
+
= 1.4:
100
=
(
(ESR)
2
2
1
0 62
.
1 5 0 010
(
.
pF
2 8
.
J
.
)(
in the MOSFET:
W
(
A
250
RSS
)
.
=
)
+
kHz
11
= 100pF, θ
A
)
)
=
1 65
.
W
JA
3770fb
=

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