ltc6360 Linear Technology Corporation, ltc6360 Datasheet - Page 5

• Manufacturer Part Number: ltc6360
• Description: Very Low Noise Single-ended Sar Adc Driver With True Zero Output
• Manufacturer: Linear Technology Corporation

elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Inputs are protected by back-to-back diodes and diodes to each
supply. If the inputs are taken beyond the supplies or the differential input
voltage exceeds 0.7V, the input current must be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LTC6360C/LTC6360I/LTC6360H are guaranteed functional over
the temperature range –40°C to 125°C.
Note 5: The LTC6360C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6360C is designed, characterized and expected to
Typical perForMance characTerisTics
see Figure 1 for circuit configuration.
–100
–200
–300
300
200
100
80
70
60
50
40
30
20
10
0
–200
0
–0.5
V
Offset Voltage vs Input Common
Mode Voltage
440 TYPICAL UNITS
V
OS
+IN
–150
INPUT COMMON MODE VOLTAGE (V)
Distribution, MS8E (PNP Stage)
= 2V
0.5
INPUT OFFSET VOLTAGE (µV)
–100
–50
T
T
T
A
A
A
1.5
= –40°C
= 25°C
= 125°C
0
2.5
50
100
3.5
150
6360 G01
6360 G04
200
4.5
–100
–200
–300
–400
–500
500
400
300
200
100
80
70
60
50
40
30
20
10
0
0
–200
–50
V
V
440 TYPICAL UNITS
V
OS
OS
+IN
–150
–25
Distribution, MS8E (NPN Stage)
vs Temperature
= 4V
INPUT OFFSET VOLTAGE (µV)
–100
0
TEMPERATURE (°C)
–50
25
0
meet specified performance from –40°C to 125°C, but are not tested or
QA sampled at these temperatures. The LTC6360I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6360H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 6: DC linearity is calculated by measuring the output vs input voltage
and calculating the maximum deviation from the least squares best fit line
at 100mV increments.
Note 7: FPBW is determined from distortion performance with HD2, HD3
< –70dBc as the criteria for a valid output. FPBW is limited by the charge
pump current sinking capability. See text for details.
Note 8: I
CPI and CPI driven by external –0.7V source.
50
50
V
V
+IN
+IN
75
100
= 4V
CPO(MAX)
= 2V
100
150
6360 G05
6360 G02
T
A
200
125
and R
= 25°C, V
CPO
are measured with CPO disconnected from
–10
–15
–20
–25
–30
–35
–40
80
70
60
50
40
30
20
10
CC
20
15
10
–5
0
–200
5
0
–1
= V
∆V
(PNP to NPN Stage)
Input Bias Current vs Input
Common Mode Voltage
440 TYPICAL UNITS
V
+IN
CHANGE IN INPUT OFFSET VOLTAGE (µV)
–150
OS
DD
INPUT COMMON MODE VOLTAGE (V)
= 2V TO 4V
Distribution, MS8E
0
= 5V, V
–100
–50
1
+IN
= 2V, V
0
LTC6360
2
50
3
SHDN
100
T
T
T
A
A
A
= 125°C
= 25°C
= –40°C
150
= 5V,
4
6360 G03
6360 G06
5
200
6360f
5