sg5842jasz-f116 Fairchild Semiconductor, sg5842jasz-f116 Datasheet - Page 10

• Manufacturer Part Number: sg5842jasz-f116
• Description: Sg5842 ? Highly Integrated Green-mode Pwm Controller
• Manufacturer: Fairchild Semiconductor

Highly Integrated Green-Mode PWM Controller
Constant Output Power Limit
When the SENSE voltage, across the sense resistor R
reaches the threshold voltage, around 0.85V, the output
GATE drive is turned off after a small delay t
introduces additional current, proportional to t
Since the delay is nearly constant regardless of the input
voltage V
additional current and the output power limit is also higher
than under low input line voltage. To compensate this
variation for a wide AC input range, a sawtooth
power-limiter (saw limiter) is designed to solve the unequal
power-limit problem. The saw limiter is designed as a
positive ramp signal (V
input of the OCP comparator. This results in a lower current
limit at high-line inputs than at low-line inputs.
V
V
damage due to abnormal conditions. Once the V
voltage is over than the V
voltage (V
latched off. The PWM pulses stay latched off until the
user unplugs the power supply from the mains outlet.
Limited Power Control
The FB voltage increases every time the output of the
power supply is shorted or over loaded. If the FB voltage
remains higher than a built-in threshold longer than t
PWM output is turned off. As PWM output is turned off,
the supply voltage V
When V
the controller is totally shut down. V
the turn-on threshold voltage of 16.5V through the
start-up resistor until PWM output is restarted. This
protection feature remains activated as long as the
over-loading condition persists. This prevents the power
supply from overheating due to over loading conditions.
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
t
D
DD
DD
-
OLP
over-voltage protection has been built in to prevent
Over-Voltage Protection
(ms)
DD
IN.
DD-OVP
goes below the turn-off threshold (eg, 10.5V)
=
. 2
Higher input voltage results in a larger
154
) and lasts for t
×
DD
I R
LIMIT_RAMP
begins decreasing.
(K
Ω
)
DD
-----------------
) and is fed to the inverting
D-OVP
over-voltage protection
, the PWM pulses is
DD
is charged up to
PD
PD
. This delay
• V
IN
D-OLP
(2)
/ L
DD
- 10 -
S
P
,
,
.
Protection Latch Circuit
For the SG5842A/JA family, the built-in latch function
provides a versatile protection feature that does not
require external components (see ordering information
for a detailed description). To reset the latch circuit,
disconnect the AC line voltage of the power supply.
Thermal Protection
An external NTC thermistor can be connected from the
RT pin to ground. A fixed current, I
RT pin. Because the impedance of the NTC decreases at
high temperatures, when the voltage of the RT pin drops
below 1.05V, PWM output is latched off. The RT pin
output current is related to the PWM frequency
programming resistor R
Noise Immunity
Noise from the current sense or the control signal may
cause significant pulse width jitter, particularly in
continuous-conduction mode. Slope compensation helps
alleviate this problem. Good placement and layout
practices should be followed. Avoid long PCB traces and
component leads. Compensation and filter components
should be located near the SG5842A/JA. Finally,
increasing the power-MOS gate resistance is advised.
www.sg.com.tw • www.fairchildsemi.com
I
.
Product Specification
RT
, is sourced from the
October 30, 2007
SG5842A/JA