pi6cv855-02 Pericom Semiconductor Corporation, pi6cv855-02 Datasheet

Page 1

... FBOUT). The clock outputs are controlled by the input clocks (CLK, CLK), the feedback clocks (FBIN,FBIN), and the Analog Power input (AV ). When the bypassed for test purposes. The PI6CV855-02 is able to track Spread Spectrum Clocking to reduce EMI. Pin Configuration GND ...

Page 2

... PI6CV855- ...

Page 3

... D D – – ± PI6CV855- μ PS8749B 02/12/08 ...

Page 4

... PI6CV855-02 200 MHz SSTL_2 PLL Clock Driver – ...

Page 5

... PI6CV855- – ...

Page 6

... DDQ /2 V DDQ /2 08-0031 Z = 60W R =120W Z = 60W Figure 1. IBIS Model Output Load C=14pF V DDQ /2 C=14pF V DDQ /2 Figure 2. Output Load Test Circuit 6 PI6CV855-02 200 MHz SSTL_2 PLL Clock Driver DDR SDRAM DDR SDRAM SCOPE PS8749B 02/12/08 ...

Page 7

... FBIN Yx Yx Yx, FBOUT Yx, FBOUT 08-0031 t t cycle n cycle n jit(cc) cycle n cycle n+1 Figure 3. Cycle-to-Cycle Jitter ∑ large number of samples) Figure 4. Static Phase Offset t sk(o) Figure 5. Output Skew 7 PI6CV855-02 200 MHz SSTL_2 PLL Clock Driver t n PS8749B 02/12/08 ...

Page 8

... jit(per) cycle n Figure 6. Period Jitter t half period jit(hper) half period n Figure 7. Half-Period Jitter 80 sl(i), sl(o) sl(i), Figure 8. Input and Output Slew Rates 8 200 MHz SSTL_2 PLL Clock Driver n+1 half period 1 2 DDQ 80% 20% 0V sl(o) PI6CV855-02 PS8749B 02/12/08 ...

Page 9

... Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 08-0031 .169 4.3 .177 4.5 .047 1.20 Max SEATING PLANE .002 0.05 .006 0.15 Package Code L Pb-free & Green, 28-pin 173-mil wide TSSOP 9 PI6CV855-02 200 MHz SSTL_2 PLL Clock Driver 0.09 .004 0.20 .008 0.45 .018 0.75 .030 .252 BSC 6.4 Package Type PS8749B 02/12/08 ...