ad7688brm Analog Devices, Inc., ad7688brm Datasheet - Page 7

• Manufacturer Part Number: ad7688brm
• Description: 16-bit, 1.5 Lsb Inl, 500 Ksps Pulsar? Differential Adc In Msop/qfn
• Manufacturer: Analog Devices, Inc.

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
1
AI = Analog Input, DI = Digital Input, DO = Digital Output, and P = Power.
Mnemonic
REF
VDD
IN+
IN−
GND
CNV
SDO
SCK
SDI
VIO
Figure 5. 10-Lead MSOP Pin Configuration
GND
VDD
REF
IN+
IN–
1
2
3
4
5
(Not to Scale)
Type
AI
P
AI
AI
P
DI
DO
DI
DI
P
AD7688
TOP VIEW
1
Function
Reference Input Voltage. The REF range is from 0.5 V to VDD. It is referred to the GND pin. This pin should
be decoupled closely to the pin with a 10 µF capacitor.
Power Supply.
Differential Positive Analog Input.
Differential Negative Analog Input.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode, chain or CS . In CS mode, it enables the SDO pin when low. In chain mode, the
data should be read when CNV is high.
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.
Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows:
Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input to
daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on
SDI is output on SDO with a delay of 16 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable
the serial output signals when low, and if SDI or CNV is low when the conversion is complete, the BUSY
indicator feature is enabled.
Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V,
or 5 V).
10
9
8
7
6
VIO
SDI
SCK
SDO
CNV
Rev 0 | Page 7 of 28
1
QFN package in development. Contact sales for samples and availability.
Figure 6. 10-Lead QFN
GND
VDD
REF
IN+
IN–
1
2
3
4
5
(Not to Scale)
AD7688
TOP VIEW
1
(LFCSP) Pin Configuration
10 VIO
9
8
7
6
SDI
SCK
SDO
CNV
AD7688