ad73422 Analog Devices, Inc., ad73422 Datasheet - Page 23

• Manufacturer Part Number: ad73422
• Description: Dual Low Power Cmos Analog Front End With Dsp Microcomputer
• Manufacturer: Analog Devices, Inc.

Full Memory Mode Pins (Mode C = 0)
Pin
Name(s)
A13:0
D23:0
Host Mode Pins (Mode C = 1)
Pin
Name(s)
IAD15:0
A0
D23:8
IWR
IRD
IAL
IS
IACK
NOTE
In Host Mode, external peripheral addresses can be decoded using the A0,
CMS, PMS, DMS and IOMS signals.
Terminating Unused Pin
The following table shows the recommendations for terminating
unused pins.
Pin Terminations
Pin
Name
XTAL
CLKOUT
A13:1 or
IAD12:0
A0
D23:8
D7 or
IWR
D6 or
IRD
D5 or
IAL
D4 or
IS
D3 or
IACK
D2:0 or
IAD15:13
PMS
DMS
BMS
IOMS
REV. 0
# of
Pins
14
24
# of
Pins
16
1
16
1
1
1
1
1
I/O
3-State
(Z)
I
O
O (Z)
I/O (Z)
O (Z)
I/O (Z)
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I/O (Z)
I/O (Z)
O (Z)
O (Z)
O (Z)
O (Z)
Input/
O
I/O
Input/
I/O
O
I/O
I
I
I
I
O
Output Function
Output Function
Reset
State
I
O
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
Hi-Z
Hi-Z
O
O
O
O
Address Output Pins for Program,
Data, Byte and I/O Spaces
Data I/O Pins for Program, Data,
Byte and I/O Spaces (8 MSBs are
also used as Byte Memory
addresses)
IDMA Port Address/Data Bus
Address Pin for External I/O,
Program, Data or Byte Access
Data I/O Pins for Program, Data
Byte and I/O Spaces
IDMA Write Enable
IDMA Read Enable
IDMA Address Latch Pin
IDMA Select
IDMA Port Acknowledge Configur-
able in Mode D; Open Source
Hi-Z*
Caused
By
BR, EBR
IS
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
IS
BR, EBR
BR, EBR
BR, EBR
BR, EBR
Unused
Configuration
Float
Float
Float
Float
Float
Float
Float
High (Inactive)
Float
High (Inactive)
Float
Low (Inactive)
Float
High (Inactive)
Float
Float
Float
Float
Float
Float
Float
Float
–23–
Pin Terminations (Continued)
Pin
Name
CMS
RD
WR
BR
BG
BGH
IRQ2/PF7
IRQL1/PF6 I/O (Z)
IRQL0/PF5 I/O (Z)
IRQE/PF4
SCLK0
RFS0
DR0
TFS0
DT0
SCLK1
RFS1/IRQ0 I/O
DR1/FI
TFS1/IRQ1 I/O
DT1/FO
EE
EBR
EBG
ERESET
EMS
EINT
ECLK
ELIN
ELOUT
NOTES
*Hi-Z = High Impedance.
1. If the CLKOUT pin is not used, turn it OFF.
2. If the Interrupt/Programmable Flag pins are not used, there are two options:
3. All bidirectional pins have three-stated outputs. When the pins is configured
4. CLKIN, RESET, and PF3:0 are not included in the table because these pins
Interrupts
The interrupt controller allows the processor to respond to the
eleven possible interrupts and RESET with minimum overhead.
The AD73422 provides four dedicated external interrupt
input pins, IRQ2, IRQL0, IRQL1 and IRQE. In addition,
SPORT1 may be reconfigured for IRQ0, IRQ1, FLAG_IN
and FLAG_OUT, for a total of six external interrupts. The
AD73422 also supports internal interrupts from the timer, the
byte DMA port, the two serial ports, software and the power-
down control circuit. The interrupt levels are internally priori-
tized and individually maskable (except power-down and reset).
Option 1: When these pins are configured as INPUTS at reset and function
as interrupts and input flag pins, pull the pins High (inactive).
Option 2: Program the unused pins as OUTPUTS, set them to 1, and let
them float.
as an output, the output is Hi-Z (high impedance) when inactive.
must be used.
I/O
3-State
(Z)
O (Z)
O (Z)
O (Z)
I
O (Z)
O
I/O (Z)
I/O (Z)
I/O
I/O
I
I/O
O
I/O
I
O
I
I
O
I
O
I
I
I
O
Reset
State
O
O
O
I
O
O
I
I
I
I
I
I
I
O
O
I
I
I
O
O
I
I
O
I
O
I
I
I
O
Hi-Z*
Caused
By
BR, EBR
BR, EBR
BR, EBR
EE
Unused
Configuration
Float
Float
Float
High (Inactive)
Float
Float
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
Input = High or Low,
Output = Float
High or Low
High or Low
High or Low
Float
Input = High or Low,
Output = Float
High or Low
High or Low
High or Low
Float
AD73422