pi74avc-16820 Pericom Semiconductor Corporation, pi74avc-16820 Datasheet

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pi74avc-16820

Manufacturer Part Number
pi74avc-16820
Description
2.5v 10-bit Flip-flop With Dual And 3-state Outputs
Manufacturer
Pericom Semiconductor Corporation
Datasheet
Features
• PI74AVC+16820 is designed for low-voltage operation,
• True ±24mA Balanced Drive @ 3.3V
• I
• 3.6V I/O Tolerant inputs and outputs
• All outputs contain a patented DDC (Dynamic Drive-
• Industrial operation: –40°C to +85°C
• Packaging (Pb-free & Green available):
Pin Configuration
V
Control) circuit that reduces noise without degrading
propagation delay.
– 56-pin 240-mil wide plastic TSSOP (A)
OFF
CC
= 1.65V to 3.6V
supports Partial power-down operation
06-0172
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Description
Pericom Semiconductor’s PI74AVC+16820, a 10-bit flip-flop
designed for 1.65V to 3.6V V
edge-triggered D-type flip- flops. On the positive transition of clock
(CLK) input. The device provides true data at the Q outputs.
A buffered output-enable (OE) input can be used to place the ten
outputs in either a normal logic state (HIGH or LOW level) or
a high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly. The high-impedance
state and increased drive provide the capacity to drive bus lines
without the need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
To ensure the high-impedance state during power-up or power-
down, OE should be tied to V
minimum value is determined by the current sinking capability of
the driver.
Block Diagram
1
2
CLK
OE
OE
D
1
28
56
55
1
TO 9 OTHER CHANNELS
2.5V 10-Bit Flip-Flop with
Dual and 3-State Outputs
1
D
CC
CC
C
through a pullup resistor whose
1
operation. It is designed with
PI74AVC+16820
PS8446E
2
3
1
1
Q
Q
06/01/06
1
2

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pi74avc-16820 Summary of contents

Page 1

... Features • PI74AVC+16820 is designed for low-voltage operation 1.65V to 3.6V CC • True ±24mA Balanced Drive @ 3.3V • I supports Partial power-down operation OFF • 3.6V I/O Tolerant inputs and outputs • All outputs contain a patented DDC (Dynamic Drive- Control) circuit that reduces noise without degrading propagation delay. ...

Page 2

... H +0.5V CC Notes High Signal Level Low Signal Level Irrelevant High Impedance Output Level before the indicated steady-state conditions were established. or GND ........... ±100mA Pin Description Pin Name 2 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs (1) each Flip-Flop Inputs CLK ↑ H ↑ ...

Page 3

... CC Active State 3-State V = 1.65V to 1.95V 2. 1.65V to 1.95V 2. 1.65V to 3. GND to ensure proper device operation. 3 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Min. Max. Units 1.65 3 1.7 2 GND V 0. 0.7 0 3.6 – ...

Page 4

... IH = –24mA 100µA = 6mA 0.57V IH = 12mA 0. 24mA 0. GND 3. GND GND GND GND CC 4 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs V Min. Typ 1.65V to 3.6V –0.2V 1.65V 1.2 2.3V 1. 1.65V to 3.6V 1.65V 2.3V 3V 3.6V 0 3.6V 3.6V 40 2.5V 4 3.3V 4 2. ...

Page 5

... Min. Max. Min. Max. Min. 6 5 1.2V CC ± 0.1V Min. Max. Min. Max. Min. V Test Conditions C = 0pF MHz outputs switching 5 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs = 1. 2. ± 0.2V ± 0.3V Max. Min. Max. Min. 150 180 3 3 3 3.3V ± ...

Page 6

... Note 2) t PHL V OH Waveform GND V OL (see Note 2) Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms 6 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Test t Open PLZ PZL t /t GND PHZ ...

Page 7

... PHL (see Note Waveform GND (see Note 2) Voltage Waveforms Enable and Disable Times Figure 2. Load Circuit and Voltage Waveforms 7 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Test PLZ PZL t /t PHZ PZH ...

Page 8

... PHL (see Note Waveform GND (see Note 2) Voltage Waveforms Enable and Disable Times Figure 3. Load Circuit and Voltage Waveforms 8 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Test t Open PLZ PZL t /t GND PHZ ...

Page 9

... PHL (see Note Waveform GND (see Note 2) Voltage Waveforms Enable and Disable Times Figure 4. Load Circuit and Voltage Waveforms 9 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs Test t Open PLZ PZL t /t GND PHZ ...

Page 10

... Package Code A 56-pin, 240-mil wide plastic TSSOP A Pb-free & Green, 56-pin, 240-mil wide plastic TSSOP 10 PI74AVC+16820 2.5V 10-Bit Flip-Flop w/Dual and 3-State Outputs ��� ��� ������������� ...

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