ics8536ag-02 Integrated Device Technology, ics8536ag-02 Datasheet - Page 8

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ics8536ag-02

Manufacturer Part Number
ics8536ag-02
Description
Xtal, Xtal, Differential Input Lvpecl Output 1 6 266-mhz Buffer
Manufacturer
Integrated Device Technology
Datasheet
T
The clock layout topology shown below is a typical ter-
mination for LVPECL outputs. The two different layouts
mentioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs
that generate ECL/LVPECL compatible outputs. There-
fore, terminating resistors (DC current path to ground)
or current sources must be used for functionality. These
8536AG-02
RTT =
ERMINATION FOR
((V
F
FOUT
IGURE
OH
+ V
OL
Integrated
Circuit
Systems, Inc.
2A. LVPECL O
) / (V
1
3.3V LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
T
RTT
ERMINATION
www.icst.com/products/hiperclocks.html
50
UTPUTS
PRELIMINARY
V
CC
L
OW
FIN
- 2V
S
KEW
8
, 1-
outputs are designed to drive 50
Matched impedance techniques should be used to maxi-
mize operating frequency and minimize signal distor-
tion. Figures 2A and 2B show two different layouts which
are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compat-
ibility across all printed circuit and clock component pro-
cess variations.
-
TO
TO
FOUT
-3.3V, 2.5V LVPECL F
-6, D
F
IGURE
UAL
2B. LVPECL O
C
Z
Z
o
o
RYSTAL OR
= 50
= 50
125
84
UTPUT
ICS8536-02
3.3V
LVCMOS I
T
transmission lines.
125
84
ANOUT
ERMINATION
REV. A AUGUST 24, 2005
FIN
B
UFFER
NPUT

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