ics83905 Integrated Device Technology, ics83905 Datasheet - Page 11

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ics83905

Manufacturer Part Number
ics83905
Description
Low Skew, 1 6 Crystal-to- Lvcmos/lvttl Fanout Buffer
Manufacturer
Integrated Device Technology
Datasheet

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C
Figure 2 shows an example of ICS83905 crystal interface with a
parallel resonant crystal. The frequency accuracy can be fine
tuned by adjusting the C1 and C2 values. For a parallel crystal
with loading capacitance CL = 18pF, we suggest C1 = 15pF and
C2 = 15pF to start with. These values may be slightly fine tuned
further to optimize the frequency accuracy for different board
LVCMOS
The XTAL_IN input can accept a single-ended LVCMOS
signal through an AC couple capacitor. A general interface
diagram is shown in Figure 3. The XTAL_OUT pin can be left
floating. The input edge rate can be as slow as 10ns. For
LVCMOS inputs, it is recommended that the amplitude be
reduced from full swing to half swing in order to prevent signal
interference with the power rail and to reduce noise. This
configuration requires that the output impedance of the driver
IDT
RYSTAL
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
/ ICS
I
LVCMOS/LVTTL FANOUT BUFFER
NPUT
TO
XTAL I
I
NTERFACE
NTERFACE
F
IGURE
3. G
VCC
V
DD
Ro
ENERAL
A
F
18pF Parallel Cry stal
IGURE
PPLICATION
Zo = Ro + Rs
D
X1
IAGRAM FOR
C2
15p
Rs
2. C
RYSTAL
C1
15p
R1 (optional)
Zo = 50
LVCMOS D
O
11
0
I
SCILLATOR
NFORMATION
layouts. Slightly increasing the C1 and C2 values will slightly reduce
the frequency. Slightly decreasing the C1 and C2 values will slightly
increase the frequency. For the oscillator circuit below, R1 can be
used, but is not required. For new designs, it is recommended
that R1 not be used.
(Ro) plus the series resistance (Rs) equals the transmission
line impedance. In addition, matched termination at the crystal
input will attenuate the signal in half. This can be done in one
of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50
and R2 can be 100 . This can also be accomplished by
removing R1 and making R2 50 .
VCC
V
DD
R1
R2
RIVER TO
XTAL_IN
XTAL_OUT
.1uf
I
NTERFACE
XTAL I
XTAL_IN
XTAL_OUT
NPUT
ICS83905AM REV. B JANUARY 24, 2008
I
NTERFACE
applications, R1

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