ics525-07 Holt Integrated Circuits, Inc., ics525-07 Datasheet
ics525-07
Related parts for ics525-07
ics525-07 Summary of contents
Page 1
... PRELIMINARY INFORMATION Description The ICS525-07/08 are the most flexible way to generate a high-quality clock output from an inexpensive crystal or clock input at low supply voltages. The user can configure the device to produce nearly any output frequency from any input frequency by grounding or floating the select pins or by driving or hard wiring the select pins high or low ...
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... PRELIMINARY INFORMATION Pin Assignment (ICS525-07 VDD 6 23 X1/ICLK GND Pin Descriptions (ICS525-07) Pin Pin Pin Number Name Type 1, 2, R5, R6, I(PU) 24-28 R0- S0, S1, S2 I(PU ...
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... Power-down. Active low. Turns off entire chip when low. Clock outputs stop low. PLL output clock. Reference output. Buffered crystal oscillator (or clock) output. 3 525 Race Street, San Jose, CA 95126 ICS525-07/08 LVCMOS User Configurable Clock Revision 101105 www.icst.com ● tel (408) 297-1201 ...
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... PRELIMINARY INFORMATION Output Frequency and Output Divider Table (ICS525-07 CLK Output Pin 5 Pin 4 Pin 3 Divider Output Frequency and Output Divider Table (ICS525-08 ...
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... For the ICS525-07 the reference divider and can 4...129. For the ICS525-08, R can be 1, 2...64. For the ICS525-07, OD can 12, or 16. For the ICS525-08, OD can 10, 11, 13, 14, 15, 17, 19, 48, or 128. The VCO must be kept in its operating range according ...
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... PRELIMINARY INFORMATION Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS525-07/08. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...
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... PRELIMINARY INFORMATION AC Electrical Characteristics Unless stated otherwise, VDD = 1 2.5 V Parameter Input Frequency Output Frequency (ICS525-07) Output Frequency (ICS525-08) Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Power-down Time, PD low to clocks stopped Power-up Time, PD high to clocks stable Absolute Clock Period Jitter, VDD = 2 ...
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... SSOP, 150 mil Body) Symbol α A aaa SEATING PLANE aaa C 8 525 Race Street, San Jose, CA 95126 ICS525-07/08 LVCMOS User Configurable Clock Millimeters Inches Min Max Min Max 1.35 1.75 .053 .069 0.10 0.25 .0040 .010 -- 1.50 -- .059 0.20 0.30 .008 .012 0.18 0.25 ...
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... Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel 9 525 Race Street, San Jose, CA 95126 ICS525-07/08 LVCMOS User Configurable Clock Package Temperature 28-pin SSOP 0 to +70°C 28-pin SSOP 0 to +70°C 28-pin SSOP 0 to +70°C 28-pin SSOP 0 to +70° ...