ics527-01 Integrated Device Technology, ics527-01 Datasheet

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ics527-01

Manufacturer Part Number
ics527-01
Description
Clock Slicer?? User Configurable Zero Delay Buffer
Manufacturer
Integrated Device Technology
Datasheet
CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER
IDT™ / ICS™ CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER 1
Description
The ICS527-01 Clock Slicer is the most flexible way to
generate an output clock from an input clock with zero
skew. The user can easily configure the device to
produce nearly any output clock that is multiplied or
divided from the input clock. The part supports
non-integer multiplications and divisions. A SYNC
pulse indicates when the rising clock edges are aligned
with zero skew. Using Phase-Locked Loop (PLL)
techniques, the device accepts an input clock up to 200
MHz and produces an output clock up to 160 MHz.
The ICS527-01 aligns rising edges on ICLK and FBIN
at a ratio determined by the reference and feedback
dividers.
For configurable clocks that do not require zero delay,
use the ICS525.
Block Diagram
OECLK2
PDTS
ICLK
FBIN
Reference
Feedback
R6:R0
Divider
Divider
F6:F0
7
7
PDTS
PLL
S1:S0
2
SYNC
Features
Packaged as 28-pin SSOP (150 mil body)
Synchronizes fractional clocks rising edges
Pin configurable multiplication/division ratio
Slices frequency or period
SYNC pulse output indicates aligned edges
Input clock frequency of 600 kHz to 200 MHz
Output clock frequencies up to 160 MHz
Very low jitter
Duty cycle of 45/55 up to 160 MHz
Operating voltage of 3.3V
Pin selectable drive strength
Multiple outputs available when combined with
fanout buffers
Industrial temperature version available
Available in Pb (lead) free package
2
GND
Divide
by 2
2
VDD
DIV2
1
0
2xDRIVE
PDTS
ICS527-01
DATASHEET
Feedback can
come from
CLK1 or CLK2
(not both)
ICS527-01
CLK1
CLK2
REV E 032405

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ics527-01 Summary of contents

Page 1

... CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER Description The ICS527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions ...

Page 2

... ZDB AND MULTIPLIER/DIVIDER CLK1 Output Frequency (MHz) Commercial (0 to 70°C) Industrial (-40 to 85° -160 70 - 140 CLK Drive Select Table DIV2 CLK2 2XDRIVE Output Drive SYNC 1 1 CLK1/2 Pin Description ICS527- REV E 032405 ...

Page 3

... CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER External Components Decoupling Capacitors As with any high performance mixed-signal IC, the ICS527-01 must be isolated from system power supply noise to perform optimally. Decoupling capacitors of 0.01µF must be connected between each VDD and the PCB ground plane. The capacitor must be connected close to the device to minimize lead inductance ...

Page 4

... Printed Circuit Board layout, so the ICS527-01 automatically produces the correct clock when all components are soldered also possible to connect the inputs to parallel I/O ports in order to switch frequencies. The output of the ICS527-01 can be determined by the following simple equation: FB Frequency = Input Frequency ...

Page 5

... MHz, de-skewed and aligned to the 125 MHz input clock. The following solution uses the MK74CB218 which has dual buffers with low pin-to-pin skew. IDT™ / ICS™ CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER 0. VDD 33 CLK1 50 MHz CLK2 SYNC 33 GND PDTS ZDB AND MULTIPLIER/DIVIDER ICS527-01 REV E 032405 ...

Page 6

... If FDW = 0, then RDW = 8. This gives the required divide-by-5 function. Setting pin DIV2 = 1 gives both a 25 MHz and a 50 MHz output from the ICS527-01. The FBIN pin is connected to the QA7 output of the MK74CB218. This aligns all the outputs of the MK74CB218 with the 25 MHz input since the ICS527-01 aligns rising edges on the ICLK and FBIN pins ...

Page 7

... Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS527-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...

Page 8

... - 2XDRIVE = 2XDRIVE = - 2XDRIVE = 2XDRIVE = 0, OS CLK outputs I 2XDRIVE = 1, OS CLK outputs R PU ZDB AND MULTIPLIER/DIVIDER Min. Typ. Max. Units 0.8 V VDD/2+1 V VDD/2-1 V 2.4 V 0.4 V 2.4 V 0.4 V ±70 mA ±140 mA 270 k ICS527-01 REV E 032405 ...

Page 9

... Note 1: Assumes clocks with same rise time, measured from rising edges at VDD/2. External Components The ICS527-01 requires two 0.01 µF decoupling capacitors to be connected between VDD and GND, one on each side of the chip. They must be connected close to the device to minimize lead inductance. No external power supply filtering is required for this device ...

Page 10

... L 0.40 1.27 .016 0 8 aaa -- 0.10 L Package Temperature 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP ICS527-01 Inches Max .069 .010 -- .059 .012 .010 .394 .244 .157 0.025 Basic .050 0.004 + +70 C ...

Page 11

... ICS527-01 CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...

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