ics542 Integrated Device Technology, ics542 Datasheet

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ics542

Manufacturer Part Number
ics542
Description
Clock Divider
Manufacturer
Integrated Device Technology
Datasheet

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CLOCK DIVIDER
Description
The ICS542 is cost effective way to produce a high-quality
clock output divided from a clock input. The chip accepts a
clock input up to 156 MHz at 3.3 V and produces a divide by
2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs
on the chip, one being a low-skew divide by two of the other.
For instance, if an 100 MHz input clock is used, the ICS542
can produce low-skew 50 MHz and 25 MHz clocks, or low
skew 25 MHz and 12.5 MHz clocks. The chip has an
all-chip power-down mode that stops the outputs low, and
an OE pin that tri-states the outputs.
See the ICS541 and ICS543 for other clock dividers, and
the ICS501, 502, 511, 512, and 525 for clock multipliers.
Block Diagram
IDT™ / ICS™ CLOCK DIVIDER
Input Clock
S1, S0
Selection
Circuitry
Divider
and
GND
VDD
1
Features
/2
8-pin SOIC package
Available in RoHS compliant package
IDT’s lowest cost clock divider
Low skew (500 ps) outputs. One is /2 of the other
Easy to use with other generators and buffers
Input clock frequency up to 156 MHz
Output clock duty cycle of 45/55
Power-down turns off chip
Output Enable
Advanced, low-power CMOS process
Operating voltage of 3.3 V or 5 V
Does not degrade phase noise - no PLL
Available in industrial and commercial temperature
ranges
OE (both outputs)
CLK1
CLK2
ICS542
DATASHEET
ICS542
REV G 122106

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ics542 Summary of contents

Page 1

... There are two outputs on the chip, one being a low-skew divide by two of the other. For instance 100 MHz input clock is used, the ICS542 can produce low-skew 50 MHz and 25 MHz clocks, or low skew 25 MHz and 12.5 MHz clocks. The chip has an all-chip power-down mode that stops the outputs low, and an OE pin that tri-states the outputs ...

Page 2

... The nominal impedance of the clock output is 20Ω. Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS542 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and the PCB ground plane. IDT™ ...

Page 3

... Other signal traces should be routed Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS542. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...

Page 4

... VDD/2+1 VDD/2 VDD/2 VDD/2-1 2 0.8 2.4 0 ± Min. Typ. Max. Units 0 156 0 156 500 15 Min. Typ. Max. Units °C/W 150 °C/W 140 °C/W 120 °C/W 40 ICS542 Ω MHz MHz REV G 122106 ...

Page 5

... ICS542M ICS542MLF 542MLF ICS542MLFT 542MLF ICS542MI ICS542MI ICS542MIT ICS542MI ICS542MILF 542MILF ICS542MILFT 542MILF Parts that are ordered with a “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Page 6

... ICS542 CLOCK DIVIDER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...

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