ics650r-05t ETC-unknow, ics650r-05t Datasheet - Page 2

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ics650r-05t

Manufacturer Part Number
ics650r-05t
Description
Hdtv Clock Synthesizer
Manufacturer
ETC-unknow
Datasheet
MDS 650-05 A
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
Pin Assignment
Key: I = Input with internal pull-up; O = output; P = power supply connection; XI, XO = crystal
connections
X1/ICLK
Pin Descriptions
Pin #
13.5M
GND
VDD
VDD
VDD
GND
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
27M
NC
X2
20 pin SSOP (QSOP)
X1/ICLK
FRCLK
2
10
13.5M
1
3
4
7
8
9
Name
5
6
VDD
VDD
VDD
GND
GND
GND
GND
GND
VDD
VDD
27M
27M
54M
FRS
NC
OE
X2
Type
16
15
14
13
12
11
17
XO
20
19
18
XI
O
O
O
O
O
P
P
P
P
P
P
P
P
P
P
-
I
I
PRELIMINARY
PRELIMINARY
VDD
OE
FRS
FRCLK
VDD
GND
GND
54M
27M
GND
Description
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Crystal connection to a 27.0 MHz crystal or leave unconnected for clock input
Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Connect to ground.
No Connect. Do not connect anything to this pin.
27 MHz buffered oscillator clock output.
13.5 MHz clock output.
Connect to ground.
Connect to ground.
27 MHz buffered clock output.
54 MHz buffered clock output.
Connect to ground.
Connect to ground.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Frame Rate Clock as shown on table.
Frame Rate Frequency Select input pin. Determines FRCLK output as shown on table.
Output Enable. Tri-states all clocks when low.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
2
INFORMATION
INFORMATION
FRCLK Output Select Table (in MHz)
FRS Pin 18
0
1
HDTV Clock Synthesizer
Revision 081199
FRCLK Pin 17
74.175824
74.250000
ICS650-05
Printed 12/4/00

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