mpc961p Integrated Device Technology, mpc961p Datasheet - Page 3

• Manufacturer Part Number: mpc961p
• Description: Lvpecl-input Lvcmos-ouput 200-mhz Low Voltage Clock Zero Delay Buffer
• Manufacturer: Integrated Device Technology

IDT™ Low Voltage Zero Delay Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC961P
Low Voltage Zero Delay Buffer
MPC961P
Table 3. Absolute Maximum Ratings
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions
Table 4. DC Characteristics (V
1. Exceeding the specified V
2. The MPC961P is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission
Table 5. AC Characteristics (V
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. t
3. Refer to
4. Refer to
494
Symbol
Symbol
Symbol
t
V
f
t
t
JIT(PER)
t
or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not
implied.
line to a termination voltage of V
V
I
REFDC
PLZ
JIT(CC)
t
V
PZL
Z
t
PD
V
OUT
f
DC
JIT(∅)
I
f
OUT
I
T
V
V
V
C
sk(O)
t
V
t
V
C
CCA
I
MAX
t
IN
V
REF
CC
CMR
OUT
I
r
lock
(∅)
IN
CC
S
, t
OH
IN
PP
OL
PD
TT
IH
IL
IN
,
,
applies for V
O
HZ
LZ
f
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Current
DC Output Current
Storage Temperature
APPLICATIONS INFORMATION
APPLICATIONS INFORMATION
Input Frequency
Maximum Output Frequency
Reference Input Duty Cycle
Propagation Delay
(static phase offset)
Output-to-Output Skew
Output Duty Cycle
Output Rise/Fall Time
Output Disable Time
Output Enable Time
Cycle-to-Cycle Jitter
Period Jitter
I/O Phase Jitter
Maximum PLL Lock Time
Input HIGH Voltage
Input LOW Voltage
Peak-to-peak input voltage
Common Mode Range
Output HIGH Voltage
Output LOW Voltage
Output Impedance
Input Current
Input Capacitance
Power Dissipation Capacitance
Maximum PLL Supply Current
Maximum Quiescent Supply Current
Output Termination Voltage
CMR
= V
CC
Characteristics
CMR
–1.3 V and V
2
Characteristics
Characteristics
/V
RMS (1σ) F_RANGE = 0
PP
TT
CC
CC
2
3
. Alternatively, the device drives up two 50 Ω series terminated transmission lines.
window results in a t
PECL_CLK to FB_IN
= 3.3 V ± 5%, T
= 3.3 V ± 5%, T
1
1
PECL_CLK, PECL_CLK
PECL_CLK, PECL_CLK
PP
F_RANGE = 0
F_RANGE = 1
F_RANGE = 0
F_RANGE = 1
F_RANGE = 0
F_RANGE = 1
F_RANGE = 1
for part-to-part skew calculation.
for calculation for other confidence factors than 1σ.
= 800 mV.
RMS (1σ)
RMS (1σ)
A
A
4
PD
= –40° to 85°C)
= –40° to 85°C)
changes of approximately 250 ps.
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
Min
100
100
–80
0.1
50
50
25
40
45
TT
.
3
Min
–0.3
500
2.0
1.2
2.4
1
Min
–0.3
–0.3
–0.3
–40
Typ
7.0
90
50
50
V
Typ
CC
4.0
8.0
2.0
14
÷ 2
0.0015
0.0010
Max
200
100
200
100
120
150
1.0
75
60
55
10
10
15
10
10
V
V
·
·
CC
CC
Max
T
T
V
V
±20
±50
125
3.6
CC
CC
+ 0.3
+ 0.3
Max
1000
±120
0.55
0.8
5.0
20
10
+ 0.3
– 0.8
Unit
MHz
MHz
ms
ps
ps
ns
ns
ns
ps
ps
ns
%
%
PLL locked
0.6 to 1.8V
T = Clock Signal Period
Unit
mV
mA
mA
µA
Unit
pF
pF
Ω
V
V
V
V
V
V
mA
mA
°C
V
V
V
Condition
LVCMOS
LVCMOS
LVPECL
LVPECL
I
I
Per Output
V
All V
OH
OL
CCA
= 20 mA
= –20 mA
Condition
CC
Condition
Pin
Pins
NETCOM
2
2
MPC961P