sy89538l Micrel Semiconductor, sy89538l Datasheet - Page 14

• Manufacturer Part Number: sy89538l
• Description: Sy89538l 3.3v Precision Lvpecl And Lvds Programmable Multiple Output Bank Clock
• Manufacturer: Micrel Semiconductor

Zero Delay FBIN Input
The SY89538L features a zero delay MUX that forces
the output to be at the same phase relationship as the
reference. This effectively configures the SY89538L
as a zero delay buffer when FBSEL is logic HIGH and
the output is fed into the feedback input FBIN as
shown in Figures 3a and 3b.
January 2008
Figure 3a. Zero Delay Mode
Figure 3b. Zero Delay Mode
(LVPECL Output)
(LVDS Output)
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How Does Zero Delay Work?
From the block diagram,
When the PLL is locked, f
Divider = FBK Divider, f
In zero delay mode, f
f
RFCK
is forced to equal f
f
REF
=
Ref.
f
RFCK
Divider
[e-mail]
OUT
RFCK
OUT
and
REF
is fed into FBIN, therefore,
.
f
FBK
is forced to equal f
= f
=
FBK
FBK
and since Ref.
f
Divider
FBIN
or [phone]
M9999-010808-E
FBIN
.