sy89429a Micrel Semiconductor, sy89429a Datasheet - Page 4

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sy89429a

Manufacturer Part Number
sy89429a
Description
Sy89429a Programmable Frequency Synthesizer 25mhz To 400mhz
Manufacturer
Micrel Semiconductor
Datasheet

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NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at
basis of its frequency reference. The output of the reference
oscillator is divided by eight before being sent to the phase
detector. With a 16MHz crystal, this provides a reference
frequency of 2MHz.
Its output is scaled by a divider that is configured by either the
serial or parallel interfaces. The output of this loop divider is also
applied to the phase detector.
frequency to be M times the reference frequency by adjusting
the VCO control voltage. Note that for some values of M (either
too high or too low) the PLL will not achieve loop lock. External
loop filter components are utilized to allow for optimal phase
jitter performance.
before being sent to the PECL output driver. The output divider
is configured through either the serial or the parallel interfaces
and can provide one of four divider ratios (2, 4, 8 or 16). This
divider extends the performance of the part while providing a
50% duty cycle.
and is capable of driving a pair of transmission lines terminated
ABSOLUTE MAXIMUM RATINGS
conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods
may affect device reliability.
FUNCTIONAL DESCRIPTION
WITH 16MHZ INPUT
Symbol
V
V
I
T
T
The internal oscillator uses the external quartz crystal as the
The VCO within the PLL operates over a range of 400–800MHz.
The phase detector and loop filter force the VCO output
The output of the VCO is also passed through an output divider
The output driver is driven differentially from the output divider
OUT
VCO Frequency
store
A
CC
I
(MHz)
400
402
404
406
794
796
798
800
Power Supply Voltage
Input Voltage
Output Source
Storage Temperature
Operating Temperature
M Count
200
201
202
203
397
398
399
400
Parameter
256
M8
Continuous
Surge
0
0
0
0
1
1
1
1
(1)
128
M7
1
1
1
1
1
1
1
1
M6
64
1
1
1
1
0
0
0
0
4
in 50ý. The positive reference for the output driver is provided by
a dedicated power pin (V
application flexibility.
The parallel interface uses the values at the M[8:0] and N[1:0]
inputs to configure the internal counters. Normally upon system
reset, the P_
becomes valid. With S_
transition of P_
interface has priority over the serial interface. Internal pull-up
resistors are provided on the M[8:0] and N[1:0] inputs to reduce
component count.
register scheme. The register shifts once per rising edge of the
S_
hold timing as specified in the AC parameters section of this
data sheet. With P_
will capture the value in the shift register on the HIGH-to-LOW
edge of the S_
information.
controlled by the T[2:0] bits in the serial data stream. See the
programming section for more information.
CLOCK
The configuration logic has two sections: serial and parallel.
The serial interface logic is implemented with a 14-bit shift
The TEST output reflects various internal node values and is
M5
32
0
0
0
0
0
0
0
0
input. The serial input S_
–0.5 to +7.0
–0.5 to +7.0
–65 to +150
–0 to +75
LOAD
Value
100
LOAD
50
LOAD
M4
16
0
0
0
0
0
0
0
1
input is held LOW until sometime after power
, the parallel inputs are captured. The parallel
input. See the programming section for more
LOAD
LOAD
CC_OUT
held HIGH, the configuration latches
M3
8
1
1
1
1
1
1
1
0
held LOW, on the LOW-to-HIGH
) to reduce noise and provide
DATA
M2
4
0
0
0
0
1
1
1
0
must meet set-up and
Precision Edge
M1
2
0
0
1
1
0
1
1
0
Unit
mA
°C
°C
V
V
SY89429A
M0
1
0
1
0
1
1
0
1
0
®

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