mc100ept24dt ON Semiconductor, mc100ept24dt Datasheet - Page 2

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mc100ept24dt

Manufacturer Part Number
mc100ept24dt
Description
Lvttl/lvcoms To Differential Lvecl Translator
Manufacturer
ON Semiconductor
Datasheet

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Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
V
NC
NC
EE
D
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
1
2
3
4
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
LVTTL
Characteristics
LVECL
8
7
6
5
http://onsemi.com
Oxygen Index: 28 to 34
Charged Device Model
V
Q
Q
GND
CC
Human Body Model
Machine Model
2
TSSOP−8
SOIC−8
DFN8
Table 1. PIN DESCRIPTION
Q, Q
D
V
GND
V
NC
EP
PIN
CC
EE
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
181 Devices
Differential LVECL Outputs
LVTTL Input
Positive Supply
Ground
Negative Supply
No Connect
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect to
the most negative supply (GND) or
leave unconnected, floating open.
FUNCTION
> 200 V
> 4 kV
> 2 kV
Value
N/A
N/A
Pb−Free Pkg
Level 1
Level 3
Level 1

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