mc100es8014 Integrated Device Technology, mc100es8014 Datasheet - Page 4

• Manufacturer Part Number: mc100es8014
• Description: Low Voltage 1 5 Differential Lvds Clock Fanout Buffer Differential Low Voltage
• Manufacturer: Integrated Device Technology

IDT™ Low Voltage 1:5 Differential LVDS Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MOTOROLA
Table 6. AC Characteristics (V
1. AC characteristics are design targets and pending characterization.
2. AC characteristics apply for parallel output termination of 50Ω to V
3. V
4. V
5. V
6. V
7. Propagation delay EN deassertion to differential output disabled (differential low: true output low, complementary output high).
8. Propagation delay EN assertion to output enabled (active).
MC100ES8014
HSTL/LVDS differential input signals (CLK0, CLK0)
V
V
f
t
PECL differential input signals (CLK1, CLK1)
V
V
f
t
HSTL clock outputs (Q[0:4], Q[0:4])
V
V
V
V
t
t
t
DC
t
t
t
CLK
PD
CLK
PD
SK(O)
SK(PP)
JIT(CC)
r
PDL
PLD
MC100ES8014
Low Voltage 1:5 Differential LVDS Clock Fanout Buffer
Symbol
DIF
X, IN
PP
CMR
X, OUT
OH
OL
O(P-P)
/ t
and the input swing lies within the V
part-to-part skew.
range and the input swing lies within the V
and part-to-part skew.
O
f
DIF
X
PP
CMR
(AC) is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is within the V
(AC) is the minimum differential PECL input voltage swing required to maintain AC characteristics including tpd and device-to-device skew.
(AC) is the minimum differential HSTL input voltage swing required to maintain AC characteristics including tpd and device-to-device skew.
(AC) is the crosspoint of the differential PECL input signal. Normal AC operation is obtained when the crosspoint is within the V
Differential input voltage (peak-to-peak)
Differential cross point voltage
Input Frequency
Propagation Delay
Differential input voltage (peak-to-peak)
Differential cross point voltage
Input Frequency
Propagation Delay
Output differential crosspoint
Output high voltage
Ouput low voltage
Differential output voltage (peak-to-peak)
Output-to-output skew
Output-to-output skew (part-to-part)
Output cycle-to-cycle jitter
Output duty cycle
Output Rise/Fall Times
Output disable time
Output enable time
Characteristic
8
7
CC
DIF
= 3.3V±5%; T
(AC) specification. Violation of V
4
6
Freescale Semiconductor, Inc.
PP
For More Information On This Product,
(AC) specification. Violation of V
3
5
J
= 0°C to 110°C)
2.5*T +t
3*T +t
TT.
0.68
Min
4
TBD
0.68
0.5
0.05
0.4
0.2
1
1
PD
1 2
PD
X
4
(AC) or V
CMR
0 – 400
0 – 400
0.75
Typ
(AC) or V
50
DIF
(AC) impacts the device propagation delay, device and
PP
(AC) impacts the device propagation delay, device
3.5*T +t
V
4*T +t
CC
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
0.9
0.5
0.9
1.0
50
– 0.6
PD
PD
Unit
MHz
MHz
ps
ps
V
V
V
V
ps
ps
ns
ns
ns
%
V
V
V
V
Differential
20% to 80%
Differential
Differential
Differential
Differential
Differential
DC
T = CLK period
T = CLK period
TIMING SOLUTIONS
fref
Condition
= 50%
X
(AC) range
CMR
MC100ES8014
NETCOM
(AC)