stcd2400 STMicroelectronics, stcd2400 Datasheet - Page 30

• Manufacturer Part Number: stcd2400
• Description: Multichannel Clock Distribution Circuit
• Manufacturer: STMicroelectronics

DC and AC parameters
Table 10.
1. Valid for ambient operating temperature: T
2. Total accuracy includes line and load regulation, temperature and process condition. It does not include load and line
3. Simulated and determined via design and not 100% tested.
4. Ripple voltage = 0.1 Vpp.
5. Clock input voltage level should not exceed VTCXO voltage.
6. The rise time is measured when clock edge transfers from 10% V
7. The quiescent current is measured when the enable pins are active, but with no input master clock signal (f
8. The active current depends on the input master clock Vpp and frequency and the load condition. The typical test condition
9. The test condition is V
10. Guaranteed for all input clock slew rates.
30/39
V
V
t
t
Sym.
V
V
Z
RECC
RECB
C
I
OPTH
OPTL
t
P
t
t
C
R
I
OUT
OO
ENH
ENL
PD
JC
OI
JP
load capacitance = 20 pF, f
transients.
edge transfers from 90%V
is 26 MHz with 1.8 Vpp master clock input, C
design between the output clocks.
IN
N
L
L
Capacitive load for each channel
Resistive load for each channel
Buffer recovery time from off to
standby to active (include LDO
STCD2xx0 recovery time from
Output impedance for each
Input to output propagation
Additive cycle-cycle jitter
Additive phase noise
Output to output isolation
Output to input isolation
DC and AC characteristics (continued)
OPT pins voltage high
Enable voltage high
Additive period jitter
OPT pins voltage low
Enable voltage low
Input capacitance
wakeup time)
Parameter
channel
delay
ENH
on
CC
(3)
= 1.8 V and V
MCLK
to 10%V
= 26 MHz (except where noted).
(3)(10)
(9)
(9)
(3)
(3)
CC
ENL
. The output rise/fall time is guaranteed for all input slew rates.
A
= –20 °C to 85 °C; V
= 0 V. When output enables simultaneously, there is no intentional skew in
L
Voltage transfer at 50%
For OPT1 and OPT2
For OPT1 and OPT2
= 20 pF.
STCD2xx0 active
at 100 kHz offset
at 10 kHz offset
Doc ID 15400 Rev 2
at 1 kHz offset
For EN1-EN4
For EN1-EN4
Condition
rms value
rms value
(1)
CC
CC
= 2.5 V to 5.1 V; typical T
to 90%V
V
CC
CC
Min
1.2
. The fall time is measured when clock
10
STCD22x0, STCD23x0, STCD24x0
–0.3
GND
–135
–145
–150
A
V
Typ
3.5
45
45
10
10
20
3
1
CC
= 25 °C;
GND+0.3
MCLK
Max
500
0.6
10
40
50
4
6
= 0 Hz).
Unit
dBc/
dB
dB
Hz
kΩ
pF
pF
ps
ps
µs
µs
ns
Ω
V
V
V
V