stcd1020 STMicroelectronics, stcd1020 Datasheet - Page 10

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stcd1020

Manufacturer Part Number
stcd1020
Description
Multi-channel Clock Distribution Circuit
Manufacturer
STMicroelectronics
Datasheet

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Device operation
The STCD1020, STCD1030 and STCD1040 are 2, 3 or 4 buffered unity gain clock
distribution circuits. They accept the clock input from an external clock source and send 2, 3
or 4 buffered outputs to different devices.
Each clock output of the STCD1020, STCD1030 and STCD1040 can be enabled for the
device connected to it. If the device connected is in standby and does not require a clock,
the buffer can be disabled to save power consumption. If all the devices connected are in
standby, the STCD1020, STCD1030 and STCD1040 will also be put into standby mode for
further power consumption saving. The enable signals and output clock signals truth table
are given in
The input DC cut capacitor is embedded in STCD1020, STCD1030 and STCD1040. A
capacitor outside is needed for each of the clock outputs. The STCD1020, STCD1030 and
STCD1040 are internally biased at 1/2 V
Table 3.
"0" means logic low and "1" means logic high. When NO CLOCK outputs, the CLKx pins
stay at High Impedance.
EN1
...
0
1
1
1
Table
EN2
Truth table for enable signals (EN 1-4) and output clocks (CLK1-4)
...
0
0
1
1
3.
EN3
...
0
0
0
1
EN4
...
0
0
0
1
NO CLOCK
CC
CLOCK
CLOCK
CLOCK
CLK1
DC voltage level at the outputs.
...
NO CLOCK
NO CLOCK
CLOCK
CLOCK
CLK2
...
NO CLOCK
NO CLOCK
NO CLOCK
CLOCK
CLK3
...
NO CLOCK
NO CLOCK
NO CLOCK
CLOCK
CLK4
...

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