nb3n3001 ON Semiconductor, nb3n3001 Datasheet - Page 4

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nb3n3001

Manufacturer Part Number
nb3n3001
Description
3.3 V 106.25 Mhz/ 212.5 Mhz Pureedge Clock Generator With Lvpecl Differential Output
Manufacturer
ON Semiconductor
Datasheet

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NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
3. Please refer to the Phase Noise Plot.
4. Output terminated with 50 W to V
Table 10. AC CHARACTERISTICS,
Symbol
f
t
t
odc
OUT
jit(∅)
R
/t
F
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Output Frequency
RMS Phase Jitter (Random)
(Note 3)
Output Rise/Fall Time
Output Duty Cycle
Parameter
CC
− 2.0 V. See Figures 4 and 12.
(V
Figure 3. Typical Phase Noise at 106.25 MHz
CC
= 3.3 V ±5%, T
24 MHz − 30 MHz Crystal
(Typ. 25 MHz − 26.5625 MHz)
106.25 MHz; Integration Range:
637 kHz −10 MHz
212.5 MHz; Integration Range:
637 kHz −10 MHz
20% to 80% (See Figure 7)
(See Figure 6)
OFFSET FREQUENCY (Hz)
http://onsemi.com
NB3N3001
A
Conditions
= −40°C to 85°C (Note 4))
4
Min
275
48
106.25/
212.5
Typ
0.3
0.3
Max
600
52
MHz
Unit
ps
ps
%

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