max9384ewpt Maxim Integrated Products, Inc., max9384ewpt Datasheet

max9384ewpt

Manufacturer Part Number

max9384ewpt

Description

Max9384 Ecl/pecl Dual Differential 2 1 Multiplexer

Manufacturer

Maxim Integrated Products, Inc.

Datasheet

1.MAX9384EWPT.pdf (10 pages)

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The MAX9384 fully differential dual 2:1 multiplexer

(mux) features extremely low propagation delay (560ps

max) and output-to-output skew (40ps max). The

device is ideal for clock and data multiplexing applica-

tions. The two 2:1 muxes are controlled individually or

simultaneously through mux select inputs COM_SEL,

SEL0, and SEL1. The mux select inputs are compatible

with ECL/PECL logic, and are referenced to on-chip

outputs V

The differential inputs D, D can be configured to accept

a single-ended signal when the unused complementary

input is connected to the on-chip supply output V

a reference voltage. All the differential inputs have bias

and clamp circuits that force the outputs to a low

default when the inputs are left open or at V

gle-ended mux select inputs have pulldowns to V

providing low default inputs when the select inputs are

left open.

The device operates with a wide supply range (V

ECL, and is pin compatible with the MC100LVEL56 and

MC100EL56. The MAX9384 is offered in a 20-pin wide

SO package, and is specified for operation from -40°C

to +85°C.

19-2484; Rev 0; 7/02

Functional Diagram appears at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

) of +3.0V to +5.5V for PECL or -3.0V to -5.5V for

High-Speed Telecom, Datacom Applications

Central-Office Backplane Clock Distribution

Access Multiplexers (DSLAM/DLC)

BB0

and V

ECL/PECL Dual Differential 2:1 Multiplexer

________________________________________________________________ Maxim Integrated Products

BB1

, nominally V

General Description

Applications

- 1.33V.

. The sin-

o 40ps

o 440ps Differential Propagation Delay

o 12ps Output-to-Output Skew

o Individual and Common Select

o +3.0V to +5.5V Supplies for Differential

o -3.0V to -5.5V Supplies for Differential LVECL/ECL

o Outputs Low for Inputs Open or at V

o >2kV ESD Protection (Human Body Model)

o Pin Compatible with MC100LVEL56 and

MAX9384EWP

LVPECL/PECL

MC100EL56

PART

TOP VIEW

P-P

Deterministic Jitter

DOb

DOa

D0a

D0b

D1a

D1b

BB0

BB1

-40°C to +85°C

TEMP RANGE

Ordering Information

MAX9384

Pin Configuration

SEL0

COM_SEL

SEL1

PIN-PACKAGE

20 Wide SO

Features

Related parts for max9384ewpt

max9384ewpt Summary of contents

Page 1

Rev 0; 7/02 ECL/PECL Dual Differential 2:1 Multiplexer General Description The MAX9384 fully differential dual 2:1 multiplexer (mux) features extremely low propagation delay (560ps max) and output-to-output skew (40ps max). The device is ideal for clock and data multiplexing ...

Page 2

ECL/PECL Dual Differential 2:1 Multiplexer ABSOLUTE MAXIMUM RATINGS .................................................................-0. Inputs (D_, D_, SEL_, COM_SEL ....-0. ..............................................................................±3.0V Continuous Output Current .................................................50mA Surge Output Current........................................................100mA V Sink/Source ...

Page 3

ECL/PECL Dual Differential 2:1 Multiplexer DC ELECTRICAL CHARACTERISTICS (continued 3.0V to 5.5V, outputs loaded with 50Ω ± 1.5V, unless otherwise noted.) (Notes PARAMETER SYMBOL CONDITIONS OUTPUT ...

Page 4

ECL/PECL Dual Differential 2:1 Multiplexer AC ELECTRICAL CHARACTERISTICS ( 3.0V to 5.5V, outputs loaded with 50Ω ± input transition time = 125ps (20% to 80%). Typical values are at V wise noted.) (Note ...

Page 5

ECL/PECL Dual Differential 2:1 Multiplexer ( 3.3V 1V IHD CC ILD = 500MHz, input duty cycle = 50%, input transition time = 125ps (20% to 80%), unless otherwise noted.) DIFFERENTIAL ...

Page 6

ECL/PECL Dual Differential 2:1 Multiplexer PIN NAME 1 D0a Noninverting Differential Input a for MUX 0. Internal 120kΩ pulldown to V D0a 2 Inverting Differential Input a for MUX 0. Internal 120kΩ pulldown to V Reference Output Voltage. Connect to ...

Page 7

ECL/PECL Dual Differential 2:1 Multiplexer DIFFERENTIAL OUTPUT WAVEFORM Figure 2. Differential Input-to-Output Propagation Delay Timing Diagram D_ WHEN WHEN Figure 3. ...

Page 8

ECL/PECL Dual Differential 2:1 Multiplexer D_a AND D_b D_a AND D_b SEL_ WHEN COM_SEL = LOW OR COM_SEL WHEN SEL_ = LOW Q_ Q_ Figure 4. Select Inputs (COM_SEL, SEL_) to Output (Q_, Detailed Description The MAX9384 dual differential 2:1 ...

Page 9

ECL/PECL Dual Differential 2:1 Multiplexer Applications Information Output Termination Terminate the outputs through 50Ω equivalent Thevenin terminations. Terminate each Q_ and Q_ output with identical termination on each for minimal distortion. When a single-ended signal is taken from ...

Page 10

ECL/PECL Dual Differential 2:1 Multiplexer (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry ...

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