max9856 Maxim Integrated Products, Inc., max9856 Datasheet
max9856
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max9856 Summary of contents
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... The ADC path also features programmable digital highpass filters to remove DC offset voltages and wind noise. The MAX9856 supports all common sample rates from 8kHz to 48kHz in both master and slave mode. The ser- ial digital audio interfaces support a variety of formats ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers ABSOLUTE MAXIMUM RATINGS (Voltages with respect to AGND.) AVDD, DVDD, DVDDS2, CPVDD .............................-0.3V to +4V PVSS, SVSS........................................Capacitor connection only AGND, DGND, CPGND.........................................-0.3V to +0.3V HPL, HPR ...................................(SVSS - 0.3V) to (AVDD + 0.3V) ...
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DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL STEREO DAC (Note 3) ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL ...
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DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL ADC/DAC DATA RATE ACCURACY ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL ...
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DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL Total Harmonic Distortion Plus ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL ...
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DirectDrive Headphone Amplifiers ELECTRICAL CHARACTERISTICS (continued AVDD CPVDD DVDDS2 DVDD C = 1µ +20dB, C NREG VPRE MICBIAS otherwise noted. Typical values are at T PARAMETER SYMBOL SLEEP MODE (JDETEN = ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS (continued 1.8V DVDD DVDDS2 A MIN PARAMETER SYMBOL SDIN or LRCLK_A/D to BCLK Rising Setup Time SDIN or LRCLK_A/D to ...
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DirectDrive Headphone Amplifiers ( 1.8V, R AVDD CPVDD DVDDS2 DVDD =1µ +20dB 1µF, V AVPRE MICBIAS TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (DAC TO HP) 100 HP ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers ( 1.8V, R AVDD CPVDD DVDDS2 DVDD =1µ +20dB 1µF, V AVPRE MICBIAS POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (DAC TO HP) 0 ...
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DirectDrive Headphone Amplifiers ( 1.8V, R AVDD CPVDD DVDDS2 DVDD =1µ +20dB 1µF, V AVPRE MICBIAS FFT, LINE IN TO ADC (48kHz) SYNCHRONOUS MASTER MODE (-60dBFS) 20 MCLK = ...
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... MBIAS PREG = +25°C, unless otherwise noted.) A DAC SOFT-START SCL 1V/div 0V 0V SDA 1V/div LINEOUTL 0V 1V/div TIME (4ms/div) DYNAMIC RANGE vs. MCLK FREQUENCY (-60dBFS) 100 DAC PLAYBACK MODE (48kHz FREQUENCY (MHz NREG MAX9856 toc30 ...
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... Digital Audio Left-Right Clock Input/Output. LRCLK_D is the audio sample rate clock that determines whether the audio data on SDIN is routed to the left or right channel. LRCLK_D is an input when the 24 LRCLK_D MAX9856 is in slave mode and an output when in master mode. LRCLK_D is also used with SDOUT if LRCLK_A is configured as a GPIO. ______________________________________________________________________________________ Low-Power Audio CODEC with ...
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... Low-Power Audio CODEC with DirectDrive Headphone Amplifiers PIN NAME Digital Audio Bit Clock Input/Output. BCLK is an input when the MAX9856 is in slave mode and an output 25 BCLK when in master mode. 26 SDOUT Digital Audio Serial Data ADC Output 27 SDIN Digital Audio Serial Data DAC Input ...
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... LN2 MIXER DACL MICR LN2 RIGHT AUDIO LN1 OUTPUT LN2 MIXER DACR AUXAC AUXDC LEFT DACL DAC DIGITAL FILTERING AND MAX9856 GAIN RIGHT DACR DAC AUXDC AUXAC LN1 LEFT ADC LEFT LN2 INPUT MIXER ADC MICL DIGITAL MICR FILTERING AND AUXAC ...
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... RMS Register Address Map The MAX9856 has 28 internal registers used for config- uration and status reporting. Table 1 lists all the regis- ters, their addresses, and power-on-reset (POR) states. Registers 0x00 and 0x01 are read only, while all the other registers are read/write ...
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DirectDrive Headphone Amplifiers Table 1. Register Map REGISTER B7 B6 Status CLD SLD Status LSNS JKSNS Interrupt Enable ICLD ISLD CLOCK CONTROL Clock Rates 0 DAC INTERFACE System DWCI DBCI Interface DPLLEN Interface ADC INTERFACE System AWCI ABCI Interface APLLEN ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers Status Registers Status registers 0x00 and 0x01 are read-only registers that report the status of various device functions. The status register bits are cleared upon a read operation of Table 2. Status Registers ...
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... B7 B6 0x02 ICLD ISLD The MAX9856 can work with a master clock supplied from any system clock (MCLK) within the range of 10MHz to 60MHz range. A clock prescaler divides create an internal clock (PCLK) in the 10MHz to 20MHz range. There are two clock-generation circuits that operate independently for the ADC and DAC path, allowing the ADC and DAC to be operated at different sample rates ...
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... Low-Power Audio CODEC with DirectDrive Headphone Amplifiers The MAX9856 DAC is capable of supporting any sam- ple rate from 8kHz to 96kHz in either master or slave mode, including all common sample rates (8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz, 88.2kHz and 96kHz). A 15-bit clock divider coefficient must be programmed into the device to set the DAC sample rate relative to the prescaled MCLK input (PCLK) ...
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... DAC PLL Enable: 0 (valid for slave and master mode)—The frequency of LRCLK_D is set by the DACNI divider bits. In master mode, the MAX9856 generates LRCLK_D using the specified divide ratio. In DPLLEN slave mode, the MAX9856 expects an LRCLK_D as specified by the divide ratio. ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers DIGITAL AUDIO INTERFACE SLAVE MODES: (LRCLK SHOULD TRANSITION ON THE UNUSED BCLK EDGE) DWCI/AWCI = 0, DBCI/ABCI = 0, DDLY/ADLY = PCM = 0 LEFT D15 D14 D13 D12 ...
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DirectDrive Headphone Amplifiers DAI STEREO SERIAL INTERFACE TIMING DIAGRAM (SLAVE MODE) SDIN/LRCLK (INPUTS BCLK (BCI = 0, INPUT) BCLK (BCI = 1, INPUT DLY SDOUT (OUTPUT) Figure 2. Digital Audio Interface ...
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... LRCLK_A is set by the ADCNI divider bits. In APLLEN master mode, the MAX9856 generates LRCLK_A using the specified divide ratio. In slave mode, the MAX9856 expects an LRCLK_A using specified divide ratio. 1 (Valid for slave mode only)—A digital PLL locks on to any externally supplied LRCLK_A signal regardless of the MCLK frequency. ADC LRCLK Divider. If APIN ≠ ...
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... ADC Interface Register Bit Description (continued) REGISTER ADC Noise Gate Threshold. The MAX9856 features a noise gate that reduces the audible noise at low signal levels. The noise gate attenuates the output at a rate of 1dB for each 2dB the signal is below the threshold. ANTH specifies the noise gate threshold level relative to the final ADC output signal level ...
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... Off 60 Automatic Gain Control The MAX9856 AGC continuously adjusts the analog microphone PGAs to maintain constant signal level. When the AGC is enabled, manual control of the input PGA is not possible. The PGA includes zero-cross detection, which prevents gain changes, from being audible. ...
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DirectDrive Headphone Amplifiers AGC Register Bit Description (continued) BITS AGC Attack Time. The attack time is the time it takes to reduce the gain after the input signal has exceeded the threshold level. The gain attenuation during attack is exponential ...
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... Low-Power Audio CODEC with DirectDrive Headphone Amplifiers The MAX9856 has two main analog mixers. The first feeds signals into the headphone and line output amplifiers while the second supplies the ADC input. Table 11. Audio Mixer Control Registers REG B7 B6 0x0E 0 0x0F ...
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... DirectDrive Headphone Amplifiers The MAX9856 features various analog inputs. All inputs have independent gain control for maximum flexibility. AUXIN is a mono auxiliary input that can be used for mixing alarms, beeps, and sound effects into the head- phone outputs or ADC input. The AUXIN signal has a ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers Audio Input Register Bit Description BITS Programmable Gain Adjust for Digital Audio Input SETTING 0x00 0x07 0x0E 0x15 0x1C 0x22 0x29 0x2F 0x35 0x3A 0x40 0x45 0x4A 0x50 PGADS 0x55 0x59 0x5E 0x63 ...
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DirectDrive Headphone Amplifiers Audio Input Register Bit Description (continued) BITS Programmable Gain Adjust for Line Inputs SETTING 0x00 0x01 0x02 0x03 0x04 0x05 PGAAUX/ PGAL1/ 0x06 PGAL2 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F ______________________________________________________________________________________ Low-Power Audio CODEC ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers Audio Input Register Bit Description (continued) BITS Left/Right Programmable Gain Adjustment for Microphone Inputs. When AGC is enabled, the PGALM and PGARM bits cannot be manually programmed. The PGALM register can be monitored ...
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... Low-Power Audio CODEC with Audio Outputs signals and microphone signals. The sharing of ground can result in interference that is audible. The MAX9856’s ground sense provides a path for the interfering signal to be input and combined with the output audio signal to reduce the audibility of the interference. Connect HGND- SNS directly to the ground terminal of the headphone jack to enable ground sense on the headphones (Figure 5) ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers Table 13. Audio Output Control Registers REGISTER B7 B6 0x18 0 HPMUTE 0x19 0 0x1A 0 VSEN Audio Output Register Bit Description BITS HPMUTE Headphone Mute Enable Headphone Volume Control SETTING 0x00 0x01 ...
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... The JKMIC bit can be configured to create a hardware interrupt that alerts the microcontroller of jack removal and insertion events. The MAX9856 is able to detect the type of load con- nected by applying a 2mA pullup current to HPL, HPR, and JACKSNS. To minimize click-and-pop the current is ramped up and down over a 24ms period. The 2mA current can be individually applied to HPL, HPR, and JACKSNS by appropriately configuring the EN bits ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers Table 14. Headset Detect Control Register REG B7 B6 0x1B 0 Table 15. Impedance Detection Routine TIME t Disable the headphone amplifiers. Set EN = 111 to enable the detection circuitry. 0 IRQ ...
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... Each transmit sequence is framed by a START (S) or REPEATED START (Sr) con- dition and a STOP (P) condition. Each word transmitted to the MAX9856 is 8 bits long and is followed by an acknowledge clock pulse. A master reading data from the MAX9856 transmits the proper slave address ...
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... The address is defined as the 7 most significant bits (MSBs) followed by the read/write bit. Setting the read/write bit to 1 configures the MAX9856 for read mode. Setting the read/write bit to 0 configures the MAX9856 for write mode. The address is the first byte of information sent to the MAX9856 after the START condition ...
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... STOP condition. Figure 11 illustrates the proper frame format for writing 1 byte of data to the MAX9856. Figure 12 illustrates the frame format for writing n-bytes of data to the MAX9856. The slave address with the R/W bit set to 0 indicates that the master intends to write data to the MAX9856 ...
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... S SLAVE ADDRESS 0 A REGISTER ADDRESS R/W Figure 14. Reading n Bytes of Indexed Data from the MAX9856 42 ______________________________________________________________________________________ The address pointer can be preset to a specific register before a read command is issued. The master presets the address pointer by first sending the MAX9856’s slave address with the R/W bit set to 0 followed by the register address ...
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... PCB. Connect the exposed thermal pad to AGND. An evaluation kit (EV Kit) is available to provide an example layout for the MAX9856. The EV Kit allows quick setup of the MAX9856 and includes easy-to-use software allowing all internal registers to be controlled. ...
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Low-Power Audio CODEC with DirectDrive Headphone Amplifiers For the latest package outline information www.maxim-ic.com/packages. 44 ______________________________________________________________________________________ Package Information ...
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DirectDrive Headphone Amplifiers For the latest package outline information and land patterns www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE 40 TDFN-EP T4066-5 ______________________________________________________________________________________ Low-Power Audio CODEC with Package Information (continued) DOCUMENT NO. 21-0141 45 ...
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... Maxim reserves the right to change the circuitry and specifications without notice at any time. 46 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products Revision History DESCRIPTION is a registered trademark of Maxim Integrated Products, Inc. PAGES CHANGED — 2–10 ...