nb6hq14m ON Semiconductor, nb6hq14m Datasheet - Page 6

• Manufacturer Part Number: nb6hq14m
• Description: 2.5v 5ghz / 6.5gbps Differential Input To 1.8v / 2.5v 1 4 Cml Clock / Data Fanout Buffer W/ Selectable
• Manufacturer: ON Semiconductor

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
11. Measured by forcing V
12. Skew is measured between outputs under identical transitions and conditions @ 0.5 GHz. Duty cycle skew is measured between differential
13. Additive RMS jitter with 50% duty cycle clock signal.
14. Additive peak−to−peak data dependent jitter with input NRZ data at PRBS23. For applications requiring equalization, the vertical eye height
15. Input and output voltage swings are single−ended measurements operating in a differential mode.
Table 6. AC CHARACTERISTICS
f
f
V
t
t
t
t
F
t
t
V
t
t
Symbol
MAX
DATAMAX
PLH
PHL
SKEW
DC
JITTER
r
f
OUTPP
FN
INPP
N
ps (20% − 80%).
outputs using the deviations of the sum of Tpw− and Tpw+ @ 0.5 GHz.
is also a critical figure of merit. See Figure 4 for equalized eye height versus data rate.
Figure 3. CLOCK Output Voltage Amplitude (V
600
500
400
300
200
100
Input Frequency (f
,
0
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
0
Maximum Input Clock Frequency;
Maximum Operating Data Rate (PRBS23)
Output Voltage Amplitude, EQEN = 0 or 1 (Note 15)
(See Figures 3 and 10)
Propagation Delay, EQEN = 0 or 1
Duty Cycle Skew (Note 12)
Output – Output Within Device Skew
Device to Device Skew
Output Clock Duty Cycle (Reference Duty Cycle = 50%)
Phase Noise, fin = 1 GHz
Integrated Phase Jitter f
Offset (RMS)
RMS Random Clock Jitter (Note 13)
Peak−to−Peak Data Dependent Jitter (Note 14)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
Output Rise/Fall Times @ 1.0 GHz
(20% − 80%)
1
f
in
Q AMP (mV)
, CLOCK INPUT FREQUENCY (GHz)
2
INPP
in
) at Ambient Temperature (Typical)
min from a 50% duty cycle clock source. All loading with an external R
3
in
4
= 1 GHz, 12 kHz − 20 MHz
V
CC
Characteristic
= 2.375 V to 2.625 V; V
5
6
http://onsemi.com
7
OUTPP
EQEN = 0 (v 3” FR4)
EQEN = 1 (12” FR4)
8
) vs.
V
CCO
6
OUT
f
in
f
= 1.71 V to 2.625 V; GND = 0 V; T
v 3.0 Gb/s
in
f
f
w 200 mV
in
in
400
350
300
250
200
150
100
v 5 GHz
100 kHz
≤ 5 GHz
= 1 GHz
50
10 MHz
20 MHz
40 MHz
IN to Q
1 MHz
10 kHz
Qx, Qx
0
0
Figure 4. NB6HQ14M Eye Height vs. Data
1
Min
200
150
100
6.5
2
45
15
5
DATE RATE (Gbps)
3
L
= 50 W to V
−132
−135
−145
−146
−147
−148
4
Typ
400
220
0.2
10
10
50
50
30
7
3
Rate
A
= −40°C to 85°C (Note 11)
4
CCO
. Input edge rates 40
6
1200
Max
275
0.8
15
15
50
55
15
10
60
5
ps pk−pk
ps pk−pk
ps rms
Gbps
8
Unit
GHz
dBc
mV
mV
ps
ps
ps
%
fs
7