mm74hc541 Fairchild Semiconductor, mm74hc541 Datasheet

mm74hc541

Manufacturer Part Number

mm74hc541

Description

Mm74hc540 * Mm74hc541 Inverting Octal 3-state Buffer * Octal 3-state Buffer

Manufacturer

Fairchild Semiconductor

Datasheet

1.MM74HC541.pdf (7 pages)

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MM74HC540WM

MM74HC540SJ

MM74HC540MTC

MM74HC540N

MM74HC541WM

MM74HC541SJ

MM74HC541MTC

MM74HC541N

MM74HC540 • MM74HC541

Inverting Octal 3-STATE Buffer • Octal 3-STATE Buffer

General Description

The MM74HC540 and MM74HC541 3-STATE buffers uti-

lize advanced silicon-gate CMOS technology. They pos-

sess high drive current outputs which enable high speed

operation even when driving large bus capacitances.

These circuits achieve speeds comparable to low power

Schottky devices, while retaining the advantage of CMOS

circuitry, i.e., high noise immunity, and low power consump-

tion. Both devices have a fanout of 15 LS-TTL equivalent

inputs.

The MM74HC540 is an inverting buffer and the

MM74HC541 is a non-inverting buffer. The 3-STATE con-

trol gate operates as a two-input NOR such that if either G1

or G2 are HIGH, all eight outputs are in the high-imped-

ance state.

In order to enhance PC board layout, the MM74HC540 and

MM74HC541 offers a pinout having inputs and outputs on

opposite sides of the package. All inputs are protected from

damage due to static discharge by diodes to V

ground.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

Pin Assignments for DIP, SOIC, SOP and TSSOP

Order Number

Package Number

MM74HC540

MTC20

Top View

M20D

M20B

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

DS005341

and

Features

Typical propagation delay: 12 ns

3-STATE outputs for connection to system buses

Wide power supply range: 2–6V

Low quiescent current: 80

Output current: 6 mA

Package Description

MM74HC541

Top View

A maximum (74HC Series)

September 1983

Revised May 2005

www.fairchildsemi.com

Related parts for mm74hc541

mm74hc541 Summary of contents

Page 1

... G2 are HIGH, all eight outputs are in the high-imped- ance state. In order to enhance PC board layout, the MM74HC540 and MM74HC541 offers a pinout having inputs and outputs on opposite sides of the package. All inputs are protected from damage due to static discharge by diodes to V ground. ...

Page 2

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) OUT DC V ...

Page 3

AC Electrical Characteristics q 5V Symbol Parameter Maximum Propagation PHL PLH Delay (540 Maximum Propagation PHL PLH Delay (541 ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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