adf4218l Analog Devices, Inc., adf4218l Datasheet - Page 6

• Manufacturer Part Number: adf4218l
• Description: Dual Low Power Frequency Synthesizers
• Manufacturer: Analog Devices, Inc.

ADF4217L/ADF4218L/ADF4219L
Mnemonic
V
V
CP
DGND
RF
RF
AGND
REF
DGND
MUXOUT
CLK
DATA
LE
AGND
NC
IF
IF
DGND
CP
V
V
DD
P
P
DD
IN
IN
1
2
IN
IN
RF
IF
1
B
A
2
IN
A
B
RF
IF
RF
IF
IF
Function
Positive Power Supply for the RF Section. Decoupling capacitors to the analog ground plane should be placed as
close as possible to this pin. V
potential as V
Power Supply for the RF Charge Pump. This should be greater than or equal to V
Output from the RF Charge Pump. When enabled, this provides ± I
drives the external VCO.
Ground Pin for the RF Digital Circuitry
Input to the RF Prescaler. This low level input signal is normally ac-coupled to the external VCO.
Complementary Input to the RF Prescaler. This point should be decoupled to the ground plane with a small
bypass capacitor, typically 100 pF.
Ground Pin for the RF Analog Circuitry
Reference Input. This is a CMOS input with a nominal threshold of V
100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator, or can be ac-coupled.
Ground Pin for the IF Digital, Interface, and Control Circuitry
This multiplexer output allows either the IF/RF Lock Detect, the scaled RF, or the scaled Reference Frequency to
be accessed externally (Table V).
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the
22-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is a
high impedance CMOS input.
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the four
latches; the latch is selected using the control bits.
Ground Pin for the IF Analog Circuitry
This pin is not connected internally (ADF4219L only).
Complementary Input to the IF Prescaler. This point should be decoupled to the ground plane with a small bypass
capacitor, typically 100 pF (ADF4217L/ADF4218L only).
Input to the IF Prescaler. This low level input signal is normally ac-coupled to the external VCO.
Ground Pin for the IF Digital, Interface, and Control Circuitry
Output from the IF Charge Pump. When enabled, this provides ± I
the external VCO.
Power Supply for the IF Charge Pump. This should be greater than or equal to V
Positive Power Supply for the IF Interface and Oscillator Sections. Decoupling capacitors to the analog ground
plane should be placed as close as possible to this pin. V
V
DD
2 must have the same potential as V
DD
2.
DD
PIN FUNCTION DESCRIPTIONS
1 should have a value of between 2.6 V and 3.3 V. V
DD
1.
–6–
DD
2 should have a value of between 2.6 V and 3.3 V.
CP
CP
to the external loop filter, which in turn drives
to the external loop filter, which in turn
DD
/2 and an equivalent input resistance of
DD
DD
.
.
DD
1 must have the same
REV. C