74vhc02mx-nl Fairchild Semiconductor, 74vhc02mx-nl Datasheet
74vhc02mx-nl
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74vhc02mx-nl Summary of contents
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... OLP ■ Pin and function compatible with 74HC02 Ordering Information Package Order Number Number 74VHC02M M14A (1) 74VHC02MX_NL M14A 74VHC02SJ M14D 74VHC02MTC MTC14 (1) 74VHC02MTCX_NL MTC14 Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number ...
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... Connection Diagram Pin Description Pin Names Inputs Outputs n ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 Logic Symbol Truth Table Description IEEE/IEC www.fairchildsemi.com ...
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... Operating Temperature OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0. Note: 2. Unused inputs must be held HIGH or LOW. They may not float. ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 Parameter (2) Parameter 3 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ± ...
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... Quiet Output Minimum OLV Dynamic V OL (3) V Minimum HIGH Level IHD Dynamic Input Voltage (3) V Maximum LOW Level ILD Dynamic Input Voltage Note: 3. Parameter guaranteed by design. ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 (V) Conditions Min. 1.50 0 –50µ 1 ...
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... PD current consumption without load. Average operating current can be obtained by the equation: (opr • V • ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 V (V) Conditions CC = 15pF 3.3 ± 0 50pF C ...
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... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 Package Number M14A 6 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 Package Number M14D 7 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1992 Fairchild Semiconductor Corporation 74VHC02 Rev. 1.3 Package MTC14 8 www.fairchildsemi.com ...
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