74lvth652 Fairchild Semiconductor, 74lvth652 Datasheet

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74lvth652

Manufacturer Part Number
74lvth652
Description
Low Voltage Octal Transceiver/register With 3-state Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
© 2000 Fairchild Semiconductor Corporation
74LVTH652WM
74LVTH652MTC
74LVTH652
Low Voltage Octal Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH652 consists of bus transceiver circuits with D-
type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from the
internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes to HIGH
logic level. Output Enable pins (OEAB, OEBA) are pro-
vided to control the transceiver function. (See Functional
Description).
The LVTH652 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
This octal transceiver/register is designed for low-voltage
(3.3V) V
TTL interface to a 5V environment. The LVTH652 is fabri-
cated with an advanced BiCMOS technology to achieve
high speed operation similar to 5V ABT while maintaining
low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Order Number
CC
applications, but with the capability to provide a
Package Number
MTC24
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS012018
Features
Input and output interface capability to systems at
5V V
Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink 32 mA/ 64 mA
Functionally compatible with the 74 series 652
Latch-up performance exceeds 500 mA
CC
Package Description
IEEE/IEC
April 2000
Revised April 2000
www.fairchildsemi.com

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74lvth652 Summary of contents

Page 1

... M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74LVTH652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Pin Descriptions Pin Names Description A –A Data Register A Inputs 3-STATE Outputs B –B Data Register B Inputs 3-STATE Outputs CPAB, CPBA Clock Pulse Inputs SAB, SBA Select Inputs Output Enable Inputs OEAB, OEBA Truth ...

Page 3

Functional Description In the transceiver mode, data present at the HIGH imped- ance port may be stored in either the register or both. The select (SAB, SBA) controls can multiplex stored and real-time. The examples below demonstrate ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...

Page 5

DC Electrical Characteristics Symbol Parameter V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage OH V Output LOW Voltage OL I Bushold Input Minimum Drive I(HOLD) I Bushold Input ...

Page 6

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay Data to Output PLH t Clock PHL t Propagation Delay Data to Output PLH t Data PHL t Propagation ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead (0.300’ Wide) Molded Small Outline Package, SOIC JEDEC Package Number M24B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Molded Small Outline Package, TSSOP JEDEC Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any ...

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